增加协议 发送队列 50ms发送数据
“ ”
This commit is contained in:
48
USER/DebugConfig/Template_STM32F407VETx.dbgconf
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48
USER/DebugConfig/Template_STM32F407VETx.dbgconf
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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
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// Version: 1.0.0
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// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
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// refer to STM32F40x STM32F41x datasheets
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// refer to STM32F42x STM32F43x datasheets
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU configuration register (DBGMCU_CR)
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// <o.2> DBG_STANDBY <i> Debug Standby Mode
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// <o.1> DBG_STOP <i> Debug Stop Mode
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// <o.0> DBG_SLEEP <i> Debug Sleep Mode
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// </h>
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DbgMCU_CR = 0x00000007;
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// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
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// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
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// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
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// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
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// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
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// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
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// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
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// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
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// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
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// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
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// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
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// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
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// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
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// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
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// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
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// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
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// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
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// </h>
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DbgMCU_APB1_Fz = 0x00000000;
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// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
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// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
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// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
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// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
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// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
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// </h>
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DbgMCU_APB2_Fz = 0x00000000;
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// <<< end of configuration section >>>
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48
USER/DebugConfig/ZNKT_STM32F407VETx.dbgconf
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48
USER/DebugConfig/ZNKT_STM32F407VETx.dbgconf
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@@ -0,0 +1,48 @@
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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
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// Version: 1.0.0
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// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
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// refer to STM32F40x STM32F41x datasheets
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// refer to STM32F42x STM32F43x datasheets
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU configuration register (DBGMCU_CR)
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// <o.2> DBG_STANDBY <i> Debug Standby Mode
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// <o.1> DBG_STOP <i> Debug Stop Mode
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// <o.0> DBG_SLEEP <i> Debug Sleep Mode
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// </h>
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DbgMCU_CR = 0x00000007;
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// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
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// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
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// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
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// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
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// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
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// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
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// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
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// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
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// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
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// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
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// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
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// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
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// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
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// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
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// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
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// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
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// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
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// </h>
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DbgMCU_APB1_Fz = 0x00000000;
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// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
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// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
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// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
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// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
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// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
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// </h>
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DbgMCU_APB2_Fz = 0x00000000;
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// <<< end of configuration section >>>
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9
USER/EventRecorderStub.scvd
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9
USER/EventRecorderStub.scvd
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<?xml version="1.0" encoding="utf-8"?>
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<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
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<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
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<events>
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</events>
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</component_viewer>
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828
USER/JLinkLog.txt
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828
USER/JLinkLog.txt
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@@ -0,0 +1,828 @@
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T0704 000:081 SEGGER J-Link V6.12a Log File (0000ms, 0074ms total)
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T0704 000:081 DLL Compiled: Dec 2 2016 16:44:26 (0000ms, 0074ms total)
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T0704 000:081 Logging started @ 2025-01-14 16:48 (0000ms, 0074ms total)
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T0704 000:081 JLINK_SetWarnOutHandler(...) (0000ms, 0074ms total)
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T0704 000:081 JLINK_OpenEx(...)
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Firmware: J-Link ARM-OB STM32 compiled Aug 22 2012 19:52:04
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Hardware: V7.00
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S/N: 20090928
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Feature(s): RDI,FlashDL,FlashBP,JFlash,GDBWEBSRV Webserver running on local port 19080 (0051ms, 0125ms total)
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T0704 000:081 returns O.K. (0051ms, 0125ms total)
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T0704 000:132 JLINK_SetErrorOutHandler(...) (0000ms, 0125ms total)
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T0704 000:132 JLINK_ExecCommand("ProjectFile = "C:\Users\zdw\Desktop\stm32f407_ZNKT01_09.1(3)\stm32f407_ZNKT01_09.1\USER\JLinkSettings.ini"", ...). C:\Program Files (x86)\SEGGER\JLink_V612a\JLinkDevices.xml evaluated successfully. returns 0x00 (0015ms, 0140ms total)
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T0704 000:149 JLINK_ExecCommand("Device = STM32F407VETx", ...). Device "STM32F407VE" selected. returns 0x00 (0000ms, 0140ms total)
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T0704 000:149 JLINK_ExecCommand("DisableConnectionTimeout", ...). returns 0x01 (0000ms, 0140ms total)
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T0704 000:149 JLINK_GetHardwareVersion() returns 0x11170 (0000ms, 0140ms total)
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T0704 000:149 JLINK_GetDLLVersion() returns 61201 (0000ms, 0140ms total)
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T0704 000:149 JLINK_GetFirmwareString(...) (0000ms, 0140ms total)
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T0704 000:150 JLINK_GetDLLVersion() returns 61201 (0000ms, 0140ms total)
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T0704 000:150 JLINK_GetCompileDateTime() (0001ms, 0141ms total)
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T0704 000:151 JLINK_GetFirmwareString(...) (0000ms, 0141ms total)
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T0704 000:151 JLINK_GetHardwareVersion() returns 0x11170 (0000ms, 0141ms total)
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T0704 000:153 JLINK_TIF_Select(JLINKARM_TIF_SWD) returns 0x00 (0040ms, 0181ms total)
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T0704 000:193 JLINK_SetSpeed(5000) (0037ms, 0218ms total)
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T0704 000:230 JLINK_GetId() >0x108 TIF>Found SWD-DP with ID 0x2BA01477 >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF>
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>0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x108 TIF>Found SWD-DP with ID 0x2BA01477 >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF>AP-IDR: 0x24770011, Type: AHB-AP
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>0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF>Found Cortex-M4 r0p1, Little endian. -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU_ReadMem(4 bytes @ 0xE0002000)FPUnit: 6 code (BP) slots and 2 literal slots -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000)
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-- CPU_WriteMem(4 bytes @ 0xE0001000) -- CPU_ReadMem(4 bytes @ 0xE000ED88) -- CPU_WriteMem(4 bytes @ 0xE000ED88) -- CPU_ReadMem(4 bytes @ 0xE000ED88) -- CPU_WriteMem(4 bytes @ 0xE000ED88)CoreSight components:ROMTbl 0 @ E00FF000 -- CPU_ReadMem(16 bytes @ 0xE00FF000) -- CPU_ReadMem(16 bytes @ 0xE000EFF0) -- CPU_ReadMem(16 bytes @ 0xE000EFE0)ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB00C SCS -- CPU_ReadMem(16 bytes @ 0xE0001FF0) -- CPU_ReadMem(16 bytes @ 0xE0001FE0)
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ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT -- CPU_ReadMem(16 bytes @ 0xE0002FF0) -- CPU_ReadMem(16 bytes @ 0xE0002FE0)ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB -- CPU_ReadMem(16 bytes @ 0xE0000FF0) -- CPU_ReadMem(16 bytes @ 0xE0000FE0)ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM -- CPU_ReadMem(16 bytes @ 0xE00FF010) -- CPU_ReadMem(16 bytes @ 0xE0040FF0) -- CPU_ReadMem(16 bytes @ 0xE0040FE0)ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 000BB9A1 TPIU
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-- CPU_ReadMem(16 bytes @ 0xE0041FF0) -- CPU_ReadMem(16 bytes @ 0xE0041FE0)ROMTbl 0 [5]: FFF42000, CID: B105900D, PID: 000BB925 ETM >0x0D TIF> >0x21 TIF> returns 0x2BA01477 (0490ms, 0708ms total)
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T0704 000:720 JLINK_GetDLLVersion() returns 61201 (0000ms, 0708ms total)
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T0704 000:720 JLINK_CORE_GetFound() returns 0xE0000FF (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x100) -- Value=0xE00FF000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x100) -- Value=0xE00FF000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x101) -- Value=0xE0041000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x102) -- Value=0x00000000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x103) -- Value=0xE0040000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x104) -- Value=0xE0000000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x105) -- Value=0xE0001000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x106) -- Value=0xE0002000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x107) -- Value=0xE000E000 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_GetDebugInfo(0x10C) -- Value=0xE000EDF0 returns 0x00 (0000ms, 0708ms total)
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T0704 000:720 JLINK_ReadMemU32(0xE000EF40, 0x0001 Items, ...) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EF40) - Data: 21 00 11 10 returns 0x01 (0005ms, 0713ms total)
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T0704 000:725 JLINK_ReadMemU32(0xE000EF44, 0x0001 Items, ...) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EF44) - Data: 11 00 00 11 returns 0x01 (0002ms, 0715ms total)
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T0704 000:727 JLINK_ReadMemU32(0xE000ED00, 0x0001 Items, ...) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000ED00) - Data: 41 C2 0F 41 returns 0x01 (0005ms, 0720ms total)
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T0704 000:732 JLINK_SetResetType(JLINKARM_CM3_RESET_TYPE_NORMAL) returns JLINKARM_CM3_RESET_TYPE_NORMAL (0000ms, 0720ms total)
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T0704 000:732 JLINK_Reset() -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) >0x35 TIF> -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000ED0C) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0)
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-- CPU_WriteMem(4 bytes @ 0xE0002000) -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000) (0062ms, 0782ms total)
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T0704 000:794 JLINK_Halt() returns 0x00 (0000ms, 0782ms total)
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T0704 000:794 JLINK_IsHalted() returns TRUE (0000ms, 0782ms total)
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T0704 000:794 JLINK_ReadMemU32(0xE000EDF0, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) - Data: 03 00 03 00 returns 0x01 (0004ms, 0786ms total)
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T0704 000:798 JLINK_WriteU32(0xE000EDF0, 0xA05F0003) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) returns 0x00 (0003ms, 0789ms total)
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T0704 000:801 JLINK_WriteU32(0xE000EDFC, 0x01000000) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) returns 0x00 (0004ms, 0793ms total)
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T0704 000:805 JLINK_GetHWStatus(...) returns 0x00 (0009ms, 0802ms total)
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T0704 000:815 JLINK_GetNumBPUnits(Type = 0xFFFFFF00) returns 0x06 (0000ms, 0802ms total)
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T0704 000:815 JLINK_GetNumBPUnits(Type = 0xF0) returns 0x2000 (0000ms, 0802ms total)
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T0704 000:815 JLINK_GetNumWPUnits() returns 0x04 (0000ms, 0802ms total)
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T0704 000:815 JLINK_GetSpeed() returns 0xFA0 (0000ms, 0802ms total)
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T0704 000:815 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000E004) - Data: 02 00 00 00 returns 0x01 (0013ms, 0815ms total)
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||||
T0704 000:828 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000E004) - Data: 02 00 00 00 returns 0x01 (0003ms, 0818ms total)
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T0704 000:831 JLINK_WriteMem(0xE0001000, 0x001C Bytes, ...) - Data: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ... -- CPU_WriteMem(28 bytes @ 0xE0001000) returns 0x1C (0004ms, 0822ms total)
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T0704 000:835 JLINK_ReadMem (0xE0001000, 0x001C Bytes, ...) -- CPU_ReadMem(28 bytes @ 0xE0001000) - Data: 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 ... returns 0x00 (0003ms, 0825ms total)
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T0704 000:838 JLINK_Halt() returns 0x00 (0000ms, 0825ms total)
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T0704 000:838 JLINK_IsHalted() returns TRUE (0000ms, 0825ms total)
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T0704 000:839 JLINK_WriteMem(0x20000000, 0x0188 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(392 bytes @ 0x20000000) returns 0x188 (0008ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 0833ms total)
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T0704 000:847 JLINK_WriteReg(R1, 0x00B71B00) returns 0x00 (0000ms, 0833ms total)
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T0704 000:847 JLINK_WriteReg(R2, 0x00000001) returns 0x00 (0000ms, 0833ms total)
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T0704 000:847 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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T0704 000:847 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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T0704 000:847 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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T0704 000:847 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(R15 (PC), 0x2000005E) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0833ms total)
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||||
T0704 000:847 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0833ms total)
|
||||
T0704 000:847 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0833ms total)
|
||||
T0704 000:847 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(2 bytes @ 0x20000000) returns 0x00000001 (0003ms, 0836ms total)
|
||||
T0704 000:850 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0002008) -- CPU_WriteMem(4 bytes @ 0xE000200C) -- CPU_WriteMem(4 bytes @ 0xE0002010) -- CPU_WriteMem(4 bytes @ 0xE0002014) -- CPU_WriteMem(4 bytes @ 0xE0002018) -- CPU_WriteMem(4 bytes @ 0xE000201C) -- CPU_WriteMem(4 bytes @ 0xE0001004) (0034ms, 0870ms total)
|
||||
T0704 000:884 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0014ms, 0884ms total)
|
||||
T0704 000:898 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_ClrBPEx(BPHandle = 0x00000001) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R1, 0x00004000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(R15 (PC), 0x20000020) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000002 (0000ms, 0870ms total)
|
||||
T0704 000:898 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0010ms, 0880ms total)
|
||||
T0704 000:908 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0014ms, 0894ms total)
|
||||
T0704 000:922 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_ClrBPEx(BPHandle = 0x00000002) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_ReadReg(R0) returns 0x00000001 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R1, 0x00004000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(R15 (PC), 0x200000C6) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000003 (0000ms, 0880ms total)
|
||||
T0704 000:922 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0010ms, 0890ms total)
|
||||
T0704 000:932 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 000:966 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 000:971 JLINK_IsHalted() returns FALSE (0002ms, 0892ms total)
|
||||
T0704 000:974 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 000:979 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 000:984 JLINK_IsHalted() returns FALSE (0005ms, 0895ms total)
|
||||
T0704 000:990 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 000:995 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:000 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:005 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:009 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:014 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:019 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:024 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:028 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:033 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:038 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:042 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:047 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:052 JLINK_IsHalted() returns FALSE (0008ms, 0898ms total)
|
||||
T0704 001:063 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:067 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:072 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:076 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:080 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:085 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:090 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:094 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:099 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:104 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:108 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:113 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:118 JLINK_IsHalted() returns FALSE (0005ms, 0895ms total)
|
||||
T0704 001:124 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:128 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:133 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:141 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:145 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:149 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:154 JLINK_IsHalted() returns FALSE (0005ms, 0895ms total)
|
||||
T0704 001:160 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:165 JLINK_IsHalted() returns FALSE (0010ms, 0900ms total)
|
||||
T0704 001:176 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:180 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:185 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:190 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:195 JLINK_IsHalted() returns FALSE (0003ms, 0893ms total)
|
||||
T0704 001:199 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:204 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:210 JLINK_IsHalted() returns FALSE (0006ms, 0896ms total)
|
||||
T0704 001:217 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:222 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:227 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:232 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:237 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:242 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:247 JLINK_IsHalted() returns FALSE (0004ms, 0894ms total)
|
||||
T0704 001:252 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 0903ms total)
|
||||
T0704 001:265 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_ClrBPEx(BPHandle = 0x00000003) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R0, 0x00000001) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R1, 0x00004000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(R15 (PC), 0x2000008C) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000004 (0000ms, 0890ms total)
|
||||
T0704 001:265 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 0902ms total)
|
||||
T0704 001:277 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0024ms, 0926ms total)
|
||||
T0704 001:301 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0902ms total)
|
||||
T0704 001:301 JLINK_ClrBPEx(BPHandle = 0x00000004) returns 0x00 (0000ms, 0902ms total)
|
||||
T0704 001:301 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 0902ms total)
|
||||
T0704 001:351 JLINK_WriteMem(0x20000000, 0x0188 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(392 bytes @ 0x20000000) returns 0x188 (0012ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R1, 0x00B71B00) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R2, 0x00000002) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(R15 (PC), 0x2000005E) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0914ms total)
|
||||
T0704 001:363 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(2 bytes @ 0x20000000) returns 0x00000005 (0003ms, 0917ms total)
|
||||
T0704 001:366 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0xE0001000) (0014ms, 0931ms total)
|
||||
T0704 001:380 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0020ms, 0951ms total)
|
||||
T0704 001:400 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0931ms total)
|
||||
T0704 001:400 JLINK_ClrBPEx(BPHandle = 0x00000005) returns 0x00 (0000ms, 0931ms total)
|
||||
T0704 001:400 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 0931ms total)
|
||||
T0704 001:400 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 60 45 00 20 BD 19 00 08 81 03 00 08 83 03 00 08 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0016ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000006 (0000ms, 0947ms total)
|
||||
T0704 001:416 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0010ms, 0957ms total)
|
||||
T0704 001:426 JLINK_IsHalted() returns FALSE (0004ms, 0961ms total)
|
||||
T0704 001:431 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0015ms, 0972ms total)
|
||||
T0704 001:446 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0957ms total)
|
||||
T0704 001:446 JLINK_ClrBPEx(BPHandle = 0x00000006) returns 0x00 (0000ms, 0957ms total)
|
||||
T0704 001:446 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 0957ms total)
|
||||
T0704 001:446 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 60 49 08 60 5E 48 08 30 00 68 5D 49 08 31 08 60 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R0, 0x08000400) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000007 (0000ms, 0972ms total)
|
||||
T0704 001:461 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 0984ms total)
|
||||
T0704 001:473 JLINK_IsHalted() returns FALSE (0004ms, 0988ms total)
|
||||
T0704 001:478 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0019ms, 1003ms total)
|
||||
T0704 001:497 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 0984ms total)
|
||||
T0704 001:497 JLINK_ClrBPEx(BPHandle = 0x00000007) returns 0x00 (0000ms, 0984ms total)
|
||||
T0704 001:497 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 0984ms total)
|
||||
T0704 001:497 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 1A 71 01 23 C0 EB C0 02 02 EB 42 02 04 EB 42 02 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R0, 0x08000800) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000008 (0000ms, 0999ms total)
|
||||
T0704 001:512 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1011ms total)
|
||||
T0704 001:524 JLINK_IsHalted() returns FALSE (0003ms, 1014ms total)
|
||||
T0704 001:528 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0012ms, 1023ms total)
|
||||
T0704 001:540 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1011ms total)
|
||||
T0704 001:540 JLINK_ClrBPEx(BPHandle = 0x00000008) returns 0x00 (0000ms, 1011ms total)
|
||||
T0704 001:540 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1011ms total)
|
||||
T0704 001:540 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: C4 F3 07 20 88 47 04 F0 F8 02 12 1D D0 B2 E3 4A ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R0, 0x08000C00) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000009 (0000ms, 1026ms total)
|
||||
T0704 001:555 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0011ms, 1037ms total)
|
||||
T0704 001:566 JLINK_IsHalted() returns FALSE (0004ms, 1041ms total)
|
||||
T0704 001:571 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1050ms total)
|
||||
T0704 001:584 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1037ms total)
|
||||
T0704 001:584 JLINK_ClrBPEx(BPHandle = 0x00000009) returns 0x00 (0000ms, 1037ms total)
|
||||
T0704 001:584 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1037ms total)
|
||||
T0704 001:584 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 08 11 01 EB 44 10 FF F7 0E FE 00 EB 05 20 85 B2 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R0, 0x08001000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000A (0000ms, 1052ms total)
|
||||
T0704 001:599 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0018ms, 1070ms total)
|
||||
T0704 001:617 JLINK_IsHalted() returns FALSE (0004ms, 1074ms total)
|
||||
T0704 001:623 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1083ms total)
|
||||
T0704 001:636 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1070ms total)
|
||||
T0704 001:636 JLINK_ClrBPEx(BPHandle = 0x0000000A) returns 0x00 (0000ms, 1070ms total)
|
||||
T0704 001:636 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1070ms total)
|
||||
T0704 001:636 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 01 25 00 E0 00 25 28 46 70 BD 2D E9 F0 41 05 46 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R0, 0x08001400) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000B (0000ms, 1085ms total)
|
||||
T0704 001:651 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0011ms, 1096ms total)
|
||||
T0704 001:662 JLINK_IsHalted() returns FALSE (0004ms, 1100ms total)
|
||||
T0704 001:667 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0014ms, 1110ms total)
|
||||
T0704 001:681 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1096ms total)
|
||||
T0704 001:681 JLINK_ClrBPEx(BPHandle = 0x0000000B) returns 0x00 (0000ms, 1096ms total)
|
||||
T0704 001:681 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1096ms total)
|
||||
T0704 001:681 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 20 02 00 EB 45 10 00 F1 18 0B 3A 46 51 46 58 46 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R0, 0x08001800) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000C (0000ms, 1111ms total)
|
||||
T0704 001:696 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0011ms, 1122ms total)
|
||||
T0704 001:707 JLINK_IsHalted() returns FALSE (0011ms, 1133ms total)
|
||||
T0704 001:720 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1135ms total)
|
||||
T0704 001:733 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1122ms total)
|
||||
T0704 001:733 JLINK_ClrBPEx(BPHandle = 0x0000000C) returns 0x00 (0000ms, 1122ms total)
|
||||
T0704 001:733 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1122ms total)
|
||||
T0704 001:733 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 03 04 9C 42 34 D1 05 68 4F 00 03 26 BE 40 B5 43 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R0, 0x08001C00) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000D (0000ms, 1137ms total)
|
||||
T0704 001:748 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1149ms total)
|
||||
T0704 001:760 JLINK_IsHalted() returns FALSE (0004ms, 1153ms total)
|
||||
T0704 001:765 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1162ms total)
|
||||
T0704 001:778 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1149ms total)
|
||||
T0704 001:778 JLINK_ClrBPEx(BPHandle = 0x0000000D) returns 0x00 (0000ms, 1149ms total)
|
||||
T0704 001:778 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1149ms total)
|
||||
T0704 001:778 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 3F 68 07 F0 3F 03 6E B1 6A 4F B7 FB F3 F7 DF F8 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0017ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R0, 0x08002000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000E (0000ms, 1166ms total)
|
||||
T0704 001:795 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0010ms, 1176ms total)
|
||||
T0704 001:805 JLINK_IsHalted() returns FALSE (0004ms, 1180ms total)
|
||||
T0704 001:812 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0016ms, 1192ms total)
|
||||
T0704 001:828 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1176ms total)
|
||||
T0704 001:828 JLINK_ClrBPEx(BPHandle = 0x0000000E) returns 0x00 (0000ms, 1176ms total)
|
||||
T0704 001:828 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1176ms total)
|
||||
T0704 001:828 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 01 49 26 39 08 70 70 47 34 38 02 40 10 B5 04 46 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R0, 0x08002400) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000F (0000ms, 1191ms total)
|
||||
T0704 001:843 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0011ms, 1202ms total)
|
||||
T0704 001:854 JLINK_IsHalted() returns FALSE (0004ms, 1206ms total)
|
||||
T0704 001:860 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0014ms, 1216ms total)
|
||||
T0704 001:874 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1202ms total)
|
||||
T0704 001:874 JLINK_ClrBPEx(BPHandle = 0x0000000F) returns 0x00 (0000ms, 1202ms total)
|
||||
T0704 001:874 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1202ms total)
|
||||
T0704 001:874 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 00 30 01 40 00 38 00 40 00 3C 00 40 00 34 01 40 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R0, 0x08002800) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000010 (0000ms, 1217ms total)
|
||||
T0704 001:889 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1229ms total)
|
||||
T0704 001:901 JLINK_IsHalted() returns FALSE (0004ms, 1233ms total)
|
||||
T0704 001:906 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1242ms total)
|
||||
T0704 001:919 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1229ms total)
|
||||
T0704 001:919 JLINK_ClrBPEx(BPHandle = 0x00000010) returns 0x00 (0000ms, 1229ms total)
|
||||
T0704 001:919 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1229ms total)
|
||||
T0704 001:919 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 0D 8A 06 EA 85 05 2B 43 4D 8A 06 EA 85 05 2B 43 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0016ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R0, 0x08002C00) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000011 (0000ms, 1245ms total)
|
||||
T0704 001:935 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0011ms, 1256ms total)
|
||||
T0704 001:946 JLINK_IsHalted() returns FALSE (0003ms, 1259ms total)
|
||||
T0704 001:950 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0014ms, 1270ms total)
|
||||
T0704 001:964 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1256ms total)
|
||||
T0704 001:964 JLINK_ClrBPEx(BPHandle = 0x00000011) returns 0x00 (0000ms, 1256ms total)
|
||||
T0704 001:964 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1256ms total)
|
||||
T0704 001:964 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 04 84 04 8C 02 FA 01 F5 AD B2 2C 43 04 84 30 BD ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R0, 0x08003000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000012 (0000ms, 1271ms total)
|
||||
T0704 001:979 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1283ms total)
|
||||
T0704 001:991 JLINK_IsHalted() returns FALSE (0004ms, 1287ms total)
|
||||
T0704 001:996 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1296ms total)
|
||||
T0704 002:009 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1283ms total)
|
||||
T0704 002:009 JLINK_ClrBPEx(BPHandle = 0x00000012) returns 0x00 (0000ms, 1283ms total)
|
||||
T0704 002:009 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1283ms total)
|
||||
T0704 002:009 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: FF F7 75 FE 05 E0 3B 46 01 22 31 46 20 46 FF F7 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R0, 0x08003400) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000013 (0000ms, 1298ms total)
|
||||
T0704 002:024 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1310ms total)
|
||||
T0704 002:036 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0017ms, 1327ms total)
|
||||
T0704 002:053 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1310ms total)
|
||||
T0704 002:053 JLINK_ClrBPEx(BPHandle = 0x00000013) returns 0x00 (0000ms, 1310ms total)
|
||||
T0704 002:053 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1310ms total)
|
||||
T0704 002:053 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: D2 B2 02 83 02 8B 42 EA 01 22 02 83 70 47 21 B1 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R0, 0x08003800) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1325ms total)
|
||||
T0704 002:068 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0001ms, 1326ms total)
|
||||
T0704 002:069 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000014 (0000ms, 1326ms total)
|
||||
T0704 002:069 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0011ms, 1337ms total)
|
||||
T0704 002:080 JLINK_IsHalted() returns FALSE (0004ms, 1341ms total)
|
||||
T0704 002:086 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0012ms, 1349ms total)
|
||||
T0704 002:098 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1337ms total)
|
||||
T0704 002:098 JLINK_ClrBPEx(BPHandle = 0x00000014) returns 0x00 (0000ms, 1337ms total)
|
||||
T0704 002:098 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1337ms total)
|
||||
T0704 002:098 JLINK_WriteMem(0x20000188, 0x0400 Bytes, ...) - Data: 5C BF 51 F8 04 3B 40 F8 04 3B AF F3 00 80 D2 07 ... -- CPU_WriteMem(1024 bytes @ 0x20000188) returns 0x400 (0015ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R0, 0x08003C00) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R1, 0x00000380) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(R15 (PC), 0x20000112) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000015 (0000ms, 1352ms total)
|
||||
T0704 002:113 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1364ms total)
|
||||
T0704 002:125 JLINK_IsHalted() returns FALSE (0003ms, 1367ms total)
|
||||
T0704 002:129 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0014ms, 1378ms total)
|
||||
T0704 002:143 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_ClrBPEx(BPHandle = 0x00000015) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R0, 0x00000002) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R1, 0x00000380) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R2, 0x20000188) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(R15 (PC), 0x2000008C) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000016 (0000ms, 1364ms total)
|
||||
T0704 002:143 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0015ms, 1379ms total)
|
||||
T0704 002:158 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1392ms total)
|
||||
T0704 002:171 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1379ms total)
|
||||
T0704 002:171 JLINK_ClrBPEx(BPHandle = 0x00000016) returns 0x00 (0000ms, 1379ms total)
|
||||
T0704 002:171 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1379ms total)
|
||||
T0704 002:221 JLINK_WriteMem(0x20000000, 0x0188 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(392 bytes @ 0x20000000) returns 0x188 (0011ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R1, 0x00B71B00) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R2, 0x00000003) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(R15 (PC), 0x2000005E) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1390ms total)
|
||||
T0704 002:232 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(2 bytes @ 0x20000000) returns 0x00000017 (0004ms, 1394ms total)
|
||||
T0704 002:236 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0xE0001000) (0036ms, 1430ms total)
|
||||
T0704 002:272 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1443ms total)
|
||||
T0704 002:285 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_ClrBPEx(BPHandle = 0x00000017) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R0, 0xFFFFFFFF) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R1, 0x08000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R2, 0x00003F80) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R3, 0x04C11DB7) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(R15 (PC), 0x20000002) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000018 (0000ms, 1430ms total)
|
||||
T0704 002:285 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1442ms total)
|
||||
T0704 002:297 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:302 JLINK_IsHalted() returns FALSE (0010ms, 1452ms total)
|
||||
T0704 002:313 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:317 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:321 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:325 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:329 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:334 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:339 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:344 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:349 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:353 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:358 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:362 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:367 JLINK_IsHalted() returns FALSE (0010ms, 1452ms total)
|
||||
T0704 002:379 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:383 JLINK_IsHalted() returns FALSE (0003ms, 1445ms total)
|
||||
T0704 002:387 JLINK_IsHalted() returns FALSE (0005ms, 1447ms total)
|
||||
T0704 002:393 JLINK_IsHalted() returns FALSE (0004ms, 1446ms total)
|
||||
T0704 002:398 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0012ms, 1454ms total)
|
||||
T0704 002:410 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_ClrBPEx(BPHandle = 0x00000018) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_ReadReg(R0) returns 0xCA256307 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R0, 0x00000003) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R1, 0x08000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R2, 0x00003F80) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R3, 0x04C11DB7) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R9, 0x20000184) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(R15 (PC), 0x2000008C) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000019 (0000ms, 1442ms total)
|
||||
T0704 002:410 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0012ms, 1454ms total)
|
||||
T0704 002:422 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0013ms, 1467ms total)
|
||||
T0704 002:435 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 1454ms total)
|
||||
T0704 002:435 JLINK_ClrBPEx(BPHandle = 0x00000019) returns 0x00 (0000ms, 1454ms total)
|
||||
T0704 002:435 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 1454ms total)
|
||||
T0704 002:485 JLINK_WriteMem(0x20000000, 0x0002 Bytes, ...) - Data: FE E7 -- CPU_WriteMem(2 bytes @ 0x20000000) returns 0x02 (0010ms, 1464ms total)
|
||||
T0704 002:501 JLINK_Close() -- CPU_ReadMem(4 bytes @ 0xE0001000) (0020ms, 1484ms total)
|
||||
T0704 002:501 (0020ms, 1484ms total)
|
||||
T0704 002:501 Closed (0020ms, 1484ms total)
|
||||
34
USER/JLinkSettings.ini
Normal file
34
USER/JLinkSettings.ini
Normal file
@@ -0,0 +1,34 @@
|
||||
[BREAKPOINTS]
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile=""
|
||||
[FLASH]
|
||||
CacheExcludeSize = 0x00
|
||||
CacheExcludeAddr = 0x00
|
||||
MinNumBytesFlashDL = 0
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 0
|
||||
Device="UNSPECIFIED"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
RAMUsageLimit = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
[MEM]
|
||||
RdOverrideOrMask = 0x00
|
||||
RdOverrideAndMask = 0xFFFFFFFF
|
||||
RdOverrideAddr = 0xFFFFFFFF
|
||||
WrOverrideOrMask = 0x00
|
||||
WrOverrideAndMask = 0xFFFFFFFF
|
||||
WrOverrideAddr = 0xFFFFFFFF
|
||||
3646
USER/ZNKT.uvguix.86186
Normal file
3646
USER/ZNKT.uvguix.86186
Normal file
File diff suppressed because one or more lines are too long
1860
USER/ZNKT.uvguix.YXYLNJ
Normal file
1860
USER/ZNKT.uvguix.YXYLNJ
Normal file
File diff suppressed because one or more lines are too long
3709
USER/ZNKT.uvguix.dev
Normal file
3709
USER/ZNKT.uvguix.dev
Normal file
File diff suppressed because one or more lines are too long
3808
USER/ZNKT.uvguix.zdw
Normal file
3808
USER/ZNKT.uvguix.zdw
Normal file
File diff suppressed because one or more lines are too long
859
USER/ZNKT.uvoptx
Normal file
859
USER/ZNKT.uvoptx
Normal file
@@ -0,0 +1,859 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>ZNKT</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>..\OBJ\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>18</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>4</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGUARM</Key>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMRTXEVENTFLAGS</Key>
|
||||
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGTARM</Key>
|
||||
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name></Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U20090928 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F407VETx$CMSIS\Flash\STM32F4xx_512.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F407VETx$CMSIS\Flash\STM32F4xx_512.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||
<Name>-U57FF67064885494932351787 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407ZG$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<WatchWindow1>
|
||||
<Ww>
|
||||
<count>0</count>
|
||||
<WinNumber>1</WinNumber>
|
||||
<ItemText>Usart1_Rx_Buf[Usart1_ucRx_length++]</ItemText>
|
||||
</Ww>
|
||||
</WatchWindow1>
|
||||
<MemoryWindow1>
|
||||
<Mm>
|
||||
<WinNumber>1</WinNumber>
|
||||
<SubType>0</SubType>
|
||||
<ItemText>Usart1_Rx_Buf[Usart1_ucRx_length++]</ItemText>
|
||||
<AccSizeX>0</AccSizeX>
|
||||
</Mm>
|
||||
</MemoryWindow1>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>1</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>1</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>0</EnableFlashSeq>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
</DebugDescription>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>USER</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\stm32f4xx_it.c</PathWithFileName>
|
||||
<FilenameWithoutPath>stm32f4xx_it.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\system_stm32f4xx.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_stm32f4xx.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>BSP</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\Usart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>Usart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\IoControl.c</PathWithFileName>
|
||||
<FilenameWithoutPath>IoControl.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\Timer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>Timer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\spi1.c</PathWithFileName>
|
||||
<FilenameWithoutPath>spi1.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\w5500.c</PathWithFileName>
|
||||
<FilenameWithoutPath>w5500.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\socket.c</PathWithFileName>
|
||||
<FilenameWithoutPath>socket.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\BSP\Src\WatchDog.c</PathWithFileName>
|
||||
<FilenameWithoutPath>WatchDog.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>CORE</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\CORE\startup_stm32f40_41xxx.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_stm32f40_41xxx.s</FilenameWithoutPath>
|
||||
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<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>45</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\FWLIB\src\stm32f4xx_usart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>stm32f4xx_usart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>46</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\FWLIB\src\stm32f4xx_wwdg.c</PathWithFileName>
|
||||
<FilenameWithoutPath>stm32f4xx_wwdg.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>SYSTEM</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>47</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\SYSTEM\delay\delay.c</PathWithFileName>
|
||||
<FilenameWithoutPath>delay.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>48</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\SYSTEM\sys\sys.c</PathWithFileName>
|
||||
<FilenameWithoutPath>sys.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>queue</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>6</GroupNumber>
|
||||
<FileNumber>49</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\queue\user_queue.c</PathWithFileName>
|
||||
<FilenameWithoutPath>user_queue.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
667
USER/ZNKT.uvprojx
Normal file
667
USER/ZNKT.uvprojx
Normal file
@@ -0,0 +1,667 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>ZNKT</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F407VETx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F4xx_DFP.2.15.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F407VETx$CMSIS\Flash\STM32F4xx_512.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:STM32F407VETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32F407VETx$CMSIS\SVD\STM32F40x.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>..\OBJ\</OutputDirectory>
|
||||
<OutputName>ZNKT</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>..\OBJ\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4099</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>Segger\JL2CM3.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>4</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x10000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>3</v6Lang>
|
||||
<v6LangP>3</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>STM32F40_41xxx,USE_STDPERIPH_DRIVER</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\CORE;..\SYSTEM\delay;..\SYSTEM\sys;..\SYSTEM\usart;..\USER;..\FWLIB\inc;..\BSP\Inc;..\queue</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>USER</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_it.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\stm32f4xx_it.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_stm32f4xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\system_stm32f4xx.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>BSP</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>Usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\Usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>IoControl.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\IoControl.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>Timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\Timer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>spi1.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\spi1.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>w5500.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\w5500.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>socket.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\socket.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>WatchDog.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\BSP\Src\WatchDog.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>CORE</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_stm32f40_41xxx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\CORE\startup_stm32f40_41xxx.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>FWLIB</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>misc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\misc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_can.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_can.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_crc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_crc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_cryp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_cryp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_cryp_aes.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_cryp_aes.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_cryp_des.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_cryp_des.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_cryp_tdes.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_cryp_tdes.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_dbgmcu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_dbgmcu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_dcmi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_dcmi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_dma2d.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_dma2d.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_exti.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_exti.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_flash_ramfunc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_flash_ramfunc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_fsmc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_fsmc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_hash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_hash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_hash_md5.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_hash_md5.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_hash_sha1.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_hash_sha1.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_iwdg.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_iwdg.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_ltdc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_ltdc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_rng.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_rng.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_rtc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_rtc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_sai.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_sai.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_sdio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_sdio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_syscfg.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_syscfg.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_tim.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f4xx_wwdg.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\FWLIB\src\stm32f4xx_wwdg.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>SYSTEM</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>delay.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\SYSTEM\delay\delay.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>sys.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\SYSTEM\sys\sys.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>queue</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>user_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\queue\user_queue.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
96
USER/main.c
Normal file
96
USER/main.c
Normal file
@@ -0,0 +1,96 @@
|
||||
#include "Include.h"
|
||||
|
||||
#include "delay.h"
|
||||
#include "IoControl.h"
|
||||
#include "Timer.h"
|
||||
#include "Usart.h"
|
||||
#include "spi1.h"
|
||||
#include "w5500.h"
|
||||
#include "socket.h"
|
||||
#include "WatchDog.h"
|
||||
|
||||
#include "user_queue.h"
|
||||
|
||||
uint16_t usRec_Length; //接收数据长度
|
||||
uint8_t ucRec_Buffer[1024*10]={0}; //接收数据缓存
|
||||
|
||||
extern uint16_t Usart1_ucRx_length;//串口1接收长度
|
||||
extern uint8_t usart1_rx_done;//串口1接收完成标志
|
||||
extern uint8_t Usart1_Rx_Buf[USART1_RX_BUFFER_SIZE];//串口1接收数据
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
parameters_init();
|
||||
led_init();
|
||||
Tim2Init();
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
ble_usart_init(BLE_USART_BAUDRATE);
|
||||
|
||||
spi1.initialize();
|
||||
w5500.initialize();
|
||||
|
||||
InitQueue(&queue);
|
||||
|
||||
WatchDogGpioInit();
|
||||
WatchDogEnable();
|
||||
while(1)
|
||||
{
|
||||
switch(getSn_SR(0)) //获取socket0的状态
|
||||
{
|
||||
case (SOCK_INIT): //TCP工作模式
|
||||
{
|
||||
listen(0); //在TCP模式下监听客户端
|
||||
}break;
|
||||
|
||||
case (SOCK_ESTABLISHED): //建立链接
|
||||
{
|
||||
if(getSn_IR(0) & Sn_IR_CON)
|
||||
{
|
||||
setSn_IR(0, Sn_IR_CON);
|
||||
}
|
||||
usRec_Length = getSn_RX_RSR(0); /*已接收数据长度*/
|
||||
if(usRec_Length>0)
|
||||
{
|
||||
recv(0, ucRec_Buffer, usRec_Length);
|
||||
|
||||
net_received_data_analysis();
|
||||
// send(0, ucRec_Buffer, usRec_Length); //自收发
|
||||
}
|
||||
}break;
|
||||
|
||||
case (SOCK_CLOSE_WAIT):
|
||||
{
|
||||
disconnect(0); /*断开连接*/
|
||||
}break;
|
||||
|
||||
case (SOCK_CLOSED):
|
||||
{
|
||||
socket(0,Sn_MR_TCP,60000,Sn_MR_ND); /*打开socket0的60000端口*/
|
||||
}break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if((IINCHIP_READ(PHYCFGR)& LINK)==0)
|
||||
{
|
||||
disconnect(0);
|
||||
socket(0,Sn_MR_TCP,60000,Sn_MR_ND); /*打开socket0的60000端口*/
|
||||
listen(0); /*在TCP模式下监听客户端*/
|
||||
}
|
||||
|
||||
if(1 == usart1_rx_done) //串口接收到数据,网口发送至客户端
|
||||
{
|
||||
usart1_rx_done = 0;
|
||||
send(0, Usart1_Rx_Buf, Usart1_ucRx_length);
|
||||
Usart1_ucRx_length = 0;
|
||||
}
|
||||
|
||||
FeedDog();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
9175
USER/stm32f4xx.h
Normal file
9175
USER/stm32f4xx.h
Normal file
File diff suppressed because it is too large
Load Diff
125
USER/stm32f4xx_conf.h
Normal file
125
USER/stm32f4xx_conf.h
Normal file
@@ -0,0 +1,125 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.4.0
|
||||
* @date 04-August-2014
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_CONF_H
|
||||
#define __STM32F4xx_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment the line below to enable peripheral header file inclusion */
|
||||
#include "stm32f4xx_adc.h"
|
||||
#include "stm32f4xx_crc.h"
|
||||
#include "stm32f4xx_dbgmcu.h"
|
||||
#include "stm32f4xx_dma.h"
|
||||
#include "stm32f4xx_exti.h"
|
||||
#include "stm32f4xx_flash.h"
|
||||
#include "stm32f4xx_gpio.h"
|
||||
#include "stm32f4xx_i2c.h"
|
||||
#include "stm32f4xx_iwdg.h"
|
||||
#include "stm32f4xx_pwr.h"
|
||||
#include "stm32f4xx_rcc.h"
|
||||
#include "stm32f4xx_rtc.h"
|
||||
#include "stm32f4xx_sdio.h"
|
||||
#include "stm32f4xx_spi.h"
|
||||
#include "stm32f4xx_syscfg.h"
|
||||
#include "stm32f4xx_tim.h"
|
||||
#include "stm32f4xx_usart.h"
|
||||
#include "stm32f4xx_wwdg.h"
|
||||
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
#if defined (STM32F429_439xx)
|
||||
#include "stm32f4xx_cryp.h"
|
||||
#include "stm32f4xx_hash.h"
|
||||
#include "stm32f4xx_rng.h"
|
||||
#include "stm32f4xx_can.h"
|
||||
#include "stm32f4xx_dac.h"
|
||||
#include "stm32f4xx_dcmi.h"
|
||||
#include "stm32f4xx_dma2d.h"
|
||||
#include "stm32f4xx_fmc.h"
|
||||
#include "stm32f4xx_ltdc.h"
|
||||
#include "stm32f4xx_sai.h"
|
||||
#endif /* STM32F429_439xx */
|
||||
|
||||
#if defined (STM32F427_437xx)
|
||||
#include "stm32f4xx_cryp.h"
|
||||
#include "stm32f4xx_hash.h"
|
||||
#include "stm32f4xx_rng.h"
|
||||
#include "stm32f4xx_can.h"
|
||||
#include "stm32f4xx_dac.h"
|
||||
#include "stm32f4xx_dcmi.h"
|
||||
#include "stm32f4xx_dma2d.h"
|
||||
#include "stm32f4xx_fmc.h"
|
||||
#include "stm32f4xx_sai.h"
|
||||
#endif /* STM32F427_437xx */
|
||||
|
||||
#if defined (STM32F40_41xxx)
|
||||
#include "stm32f4xx_cryp.h"
|
||||
#include "stm32f4xx_hash.h"
|
||||
#include "stm32f4xx_rng.h"
|
||||
#include "stm32f4xx_can.h"
|
||||
#include "stm32f4xx_dac.h"
|
||||
#include "stm32f4xx_dcmi.h"
|
||||
#include "stm32f4xx_fsmc.h"
|
||||
#endif /* STM32F40_41xxx */
|
||||
|
||||
#if defined (STM32F411xE)
|
||||
#include "stm32f4xx_flash_ramfunc.h"
|
||||
#endif /* STM32F411xE */
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* If an external clock source is used, then the value of the following define
|
||||
should be set to the value of the external clock source, else, if no external
|
||||
clock is used, keep this define commented */
|
||||
/*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
|
||||
|
||||
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32F4xx_CONF_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
168
USER/stm32f4xx_it.c
Normal file
168
USER/stm32f4xx_it.c
Normal file
@@ -0,0 +1,168 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.4.0
|
||||
* @date 04-August-2014
|
||||
* @brief Main Interrupt Service Routines.
|
||||
* This file provides template for all exceptions handler and
|
||||
* peripherals interrupt service routine.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_it.h"
|
||||
|
||||
|
||||
/** @addtogroup Template_Project
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SVCall exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles PendSVC exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SysTick Handler.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F4xx Peripherals Interrupt Handlers */
|
||||
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
|
||||
/* available peripheral interrupt handler's name please refer to the startup */
|
||||
/* file (startup_stm32f4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles PPP interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
/*void PPP_IRQHandler(void)
|
||||
{
|
||||
}*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
60
USER/stm32f4xx_it.h
Normal file
60
USER/stm32f4xx_it.h
Normal file
@@ -0,0 +1,60 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.4.0
|
||||
* @date 04-August-2014
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_IT_H
|
||||
#define __STM32F4xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
1130
USER/system_stm32f4xx.c
Normal file
1130
USER/system_stm32f4xx.c
Normal file
File diff suppressed because it is too large
Load Diff
105
USER/system_stm32f4xx.h
Normal file
105
USER/system_stm32f4xx.h
Normal file
@@ -0,0 +1,105 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f4xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.4.0
|
||||
* @date 04-August-2014
|
||||
* @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32F4XX_H
|
||||
#define __SYSTEM_STM32F4XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32F4XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Reference in New Issue
Block a user