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增加协议 发送队列 50ms发送数据

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Hjh
2025-01-15 16:02:53 +08:00
commit e48aa3d84b
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21
BSP/Inc/Include.h Normal file
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#ifndef _INCLUDE_H_
#define _INCLUDE_H_
#include "stm32f4xx.h"
#include "stm32f4xx_adc.h"
#include "stm32f4xx_dma.h"
#include "stm32f4xx_exti.h"
#include "stm32f4xx_flash.h"
#include "stm32f4xx_gpio.h"
#include "stm32f4xx_rcc.h"
#include "stm32f4xx_spi.h"
#include "stm32f4xx_tim.h"
#include "stm32f4xx_usart.h"
#include "stm32f4xx_iwdg.h"
#include "stm32f4xx_syscfg.h"
#include "stm32f4xx_cryp.h"
#include "misc.h"
#endif

9
BSP/Inc/IoControl.h Normal file
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#ifndef _IOCONTROL_H_
#define _IOCONTROL_H_
void led_init(void);
#endif

11
BSP/Inc/Timer.h Normal file
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#ifndef _TIMER_H_
#define _TIMER_H_
#include "Include.h"
void Tim2Init(void);
extern uint8_t tim_flag;
#endif

142
BSP/Inc/Usart.h Normal file
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#ifndef _USART_H_
#define _USART_H_
#include "stdint.h"
#include "Include.h"
#include "user_queue.h"
#define MAX_SLAVE_NUMBER ( 8 )
#define MAC_ADDRESS_LENGTH ( 12 )
#define BLE_USART ( USART1 )
#define BLE_USART_GPIO_CLK ( RCC_AHB1Periph_GPIOB )
#define BLE_USART_CLK ( RCC_APB2Periph_USART1 )
#define BLE_USART_GPIO_PORT ( GPIOB )
#define BLE_USART_TX_GPIO_PIN ( GPIO_Pin_6 )
#define BLE_USART_RX_GPIO_PIN ( GPIO_Pin_7 )
#define BLE_USART_BAUDRATE ( 115200 )
#define BLE_NVIC_IRQChannel ( USART1_IRQn )
/**********************复用**************************/
#define BLE_USART_TX_PinSource ( GPIO_PinSource6 )
#define BLE_USART_RX_PinSource ( GPIO_PinSource7 )
#define BLE_GPIO_AF_USART ( GPIO_AF_USART1 )
#define USART1_RX_BUFFER_SIZE ( 50 )
#define FrameHead ( 0xAA )
#define FrameTail ( 0x55 )
/*********功能码**********/
#define WaveformSet ( 0x71 )
#define AcquisitionCtrl ( 0x72 )
#define CurrentSet ( 0x73 )
#define EMG_DataReport ( 0x74 )
#define EMG_FormatSwitching ( 0x75 )
#define CurrentPreinstallCtrl ( 0x76 )
#define TriggerModeCtrl ( 0x77 )
#define Poll ( 0x78 )
#define SliceFalLSwitch ( 0x79 )
#define ShutDown ( 0x7A )
/***********偏移***********/
#define HeadOffset ( 0x00 )
#define LengthOffset ( 0x01 )
#define FunctionCodeOffset ( 0x02 )
#define DeviceNumberOffset ( 0x03 )
#define ChannelOffset ( 0x04 )
/**********数据************/
#define ChannelModeAcquisition ( 0x01 )
#define ChannelModeStimulation ( 0x02 )
#define ChannelModeTrigger ( 0x03 )
#define AcquisitionRate4K ( 0x01 )
#define AcquisitionRate8K ( 0x02 )
#define TurnOff ( 0x00 )
#define TurnOn ( 0x01 )
#define Pause ( 0x02 )
#define Continue ( 0x03 )
#define RMS_Data ( 0x00 )
#define OriginalData ( 0x01 )
#define Acquisition ( 0x00 )
#define Stimulation ( 0x01 )
#define SliceFall ( 0x00 )
#define SliceConnect ( 0x01 )
#define SliceUnmonitored ( 0x02 )
#define IdleState ( 0x00 )
#define ClimbState ( 0x01 )
#define DownState ( 0x02 )
#define KeepState ( 0x03 )
#define RestState ( 0x04 )
#define Charging ( 0x00 )
#define BatterySupply ( 0x01 )
#define SlaveConnect ( 0x01 )
#define SlaveDisconnect ( 0x02 )
#define BLE_Disconnect ( 0x01 )
#define BLE_Connect ( 0x02 )
#define Reset ( 0x00 )
#define NotReset ( 0x01 )
typedef struct
{
uint8_t mode; //模式
uint8_t rate; //采样率
uint8_t EMG_data_mode; //肌电数据模式
uint8_t state; //开关状态
}channel_data_t;
typedef struct
{
channel_data_t channel1;
channel_data_t channel2;
uint8_t output_current_mA; //输出电流强度
uint8_t preinstall_state; //预设开关
uint8_t stimulate_state; //刺激开关
uint8_t slice_state; //极片状态
uint8_t slice_detect_state; //脱落检测开关
uint8_t formwave_state; //波形状态
uint8_t mac_address[MAC_ADDRESS_LENGTH]; //mac
uint8_t connection_state; //蓝牙连接状态
uint8_t adapter_state; //适配器状态
uint8_t electric_quantity; //电量
uint8_t reset_flag; //复位标志位
uint16_t frequency_Hz; //频率
uint16_t width_us; //脉宽
uint16_t climb_time_ms; //上升时间
uint16_t keep_time_ms; //保持时间
uint16_t down_time_ms; //下降时间
uint16_t rest_time_ms; //休息时间
}device_state_t;
void ble_usart_init(uint32_t baudrate);
//void ble_usart_send(uint8_t *ucpTx_Data,uint8_t ucTx_length);
uint8_t ble_usart_send(uint8_t ucTx_length);
uint8_t Analysis_data(void);
extern uint8_t usart1_tx_done ;//串口1发送完成标志
void net_received_data_analysis(void);
void parameters_init(void);
#endif

63
BSP/Inc/WatchDog.h Normal file
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/******************************************************************
*版权所有 (C)2019, 河南翔宇医疗有限公司南京分公司
*
*文件名称: WatchDog.h
*文件标识:
*内容摘要:
*其它说明:
*当前版本:
*作 者:
*完成日期:
*
*修改记录1:
* 修改日期:
* 版 本 号:
* 修 改 人:
* 修改内容:
******************************************************************/
#ifndef _WATCHDOG_H
#define _WATCHDOG_H
/******************************************************************
* 头文件 *
******************************************************************/
#include "stm32f4xx.h"
/******************************************************************
* 常量 *
******************************************************************/
/******************************************************************
* 宏定义 *
******************************************************************/
#define WDG_WDI_GPIO_CLK ( RCC_AHB1Periph_GPIOE )
#define WDG_WDI_GPIO_PORT ( GPIOE )
#define WDG_WDI_GPIO_PIN ( GPIO_Pin_6 )
#define WDG_EN_GPIO_CLK ( RCC_AHB1Periph_GPIOE )
#define WDG_EN_GPIO_PORT ( GPIOE )
#define WDG_EN_GPIO_PIN ( GPIO_Pin_5 )
/******************************************************************
* 数据类型 *
******************************************************************/
/******************************************************************
* 全局变量声明 *
******************************************************************/
/******************************************************************
* 全局函数声明 *
******************************************************************/
void CloseHardWatchDogGpioInit(void);
void WatchDogGpioInit(void);
void WatchDogEnable(void);
void WatchDogDisable(void);
void FeedDog(void);
#endif

30
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/*
*
@file socket.h
@brief define function of socket API
*
*/
#ifndef _SOCKET_H_
#define _SOCKET_H_
#include "Types.h"
extern uint8 socket(SOCKET s, uint8 protocol, uint16 port, uint8 flag); // Opens a socket(TCP or UDP or IP_RAW mode)
extern void close(SOCKET s); // Close socket
extern uint8 connect(SOCKET s, uint8 * addr, uint16 port); // Establish TCP connection (Active connection)
extern void disconnect(SOCKET s); // disconnect the connection
extern uint8 listen(SOCKET s); // Establish TCP connection (Passive connection)
extern uint16 send(SOCKET s, const uint8 * buf, uint16 len); // Send data (TCP)
extern uint16 recv(SOCKET s, uint8 * buf, uint16 len); // Receive data (TCP)
extern uint16 sendto(SOCKET s, const uint8 * buf, uint16 len, uint8 * addr, uint16 port); // Send data (UDP/IP RAW)
extern uint16 recvfrom(SOCKET s, uint8 * buf, uint16 len, uint8 * addr, uint16 *port); // Receive data (UDP/IP RAW)
#ifdef __MACRAW__
void macraw_open(void);
uint16 macraw_send( const uint8 * buf, uint16 len ); //Send data (MACRAW)
uint16 macraw_recv( uint8 * buf, uint16 len ); //Recv data (MACRAW)
#endif
#endif
/* _SOCKET_H_ */

43
BSP/Inc/spi1.h Normal file
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/*
* FILE : spi.h
* DESCRIPTION : This file is iHMI43 spi header.
* Author : XiaomaGee@Gmail.com
* Copyright :
*
* History
* --------------------
* Rev : 0.00
* Date : 03/05/2012
*
* create.
* --------------------
*/
#ifndef __SPI1_H__
#define __SPI1_H__
#include "stm32f4xx_rcc.h"
#include "stm32f4xx_spi.h"
#include "stm32f4xx_gpio.h"
#include <stdio.h>
//-----------------Include files-------------------------//
//------------------- Define ----------------------------//
#define SPI1_CS_OFF GPIO_ResetBits(GPIOA,GPIO_Pin_4)
#define SPI1_CS_ON GPIO_SetBits(GPIOA,GPIO_Pin_4)
//------------------- Typedef --------------------------//
typedef struct{
int (* initialize)(void);
int (* write)(int /* number */,uint8_t * /* buffer */);
uint8_t (* send_data)(uint8_t );
}SPI1_T;
//------------------- Extern --------------------------//
extern SPI1_T spi1;
#endif //__SPI6_H__

109
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/*
*
@file type.h
*
*/
#ifndef _TYPE_H_
#define _TYPE_H_
/***************************************************
* attribute for mcu ( types, ... )
***************************************************/
#define MAX_SOCK_NUM 8 /**< Maxmium number of socket */
/**
@brief __DEF_IINCHIP_MAP_xxx__ : define memory map for iinchip
*/
#define __DEF_IINCHIP_MAP_BASE__ 0x0000
#define COMMON_BASE 0x0000
#define __DEF_IINCHIP_MAP_TXBUF__ (COMMON_BASE + 0x8000) /* Internal Tx buffer address of the iinchip */
#define __DEF_IINCHIP_MAP_RXBUF__ (COMMON_BASE + 0xC000) /* Internal Rx buffer address of the iinchip */
//#define __DEF_IINCHIP_PPP
#define IINCHIP_ISR_DISABLE()
#define IINCHIP_ISR_ENABLE()
#ifndef NULL
#define NULL ((void *) 0)
#endif
//typedef enum { false, true } bool;
#ifndef _SIZE_T
#define _SIZE_T
typedef unsigned int size_t;
#endif
/**
* The 8-bit signed data type.
*/
typedef char int8;
/**
* The volatile 8-bit signed data type.
*/
typedef volatile char vint8;
/**
* The 8-bit unsigned data type.
*/
typedef unsigned char uint8;
/**
* The volatile 8-bit unsigned data type.
*/
typedef volatile unsigned char vuint8;
/**
* The 16-bit signed data type.
*/
typedef int int16;
/**
* The volatile 16-bit signed data type.
*/
//typedef volatile int vint16;
/**
* The 16-bit unsigned data type.
*/
typedef unsigned short uint16;
/**
* The volatile 16-bit unsigned data type.
*/
//typedef volatile unsigned int vuint16;
/**
* The 32-bit signed data type.
*/
typedef long int32;
/**
* The volatile 32-bit signed data type.
*/
//typedef volatile long vint32;
/**
* The 32-bit unsigned data type.
*/
typedef unsigned long uint32;
/**
* The volatile 32-bit unsigned data type.
*/
//typedef volatile unsigned long vuint32;
/* bsd */
typedef uint8 u_char; /**< 8-bit value */
typedef uint8 SOCKET;
typedef uint16 u_short; /**< 16-bit value */
typedef uint16 u_int; /**< 16-bit value */
typedef uint32 u_long; /**< 32-bit value */
typedef union _un_l2cval {
u_long lVal;
u_char cVal[4];
}un_l2cval;
typedef union _un_i2cval {
u_int iVal;
u_char cVal[2];
}un_i2cval;
#endif /* _TYPE_H_ */

444
BSP/Inc/w5500.h Normal file
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/*
@file w5500.h
*/
#ifndef _W5500_H_
#define _W5500_H_
#include "types.h"
/**
@brief Mode Register address
* W5500 SPI Frame consists of 16bits Offset Address in Address Phase,
* 8bits Control Phase and N bytes Data Phase.
* 0 8 16 24 ~
* |----------------|----------------|----------------|----------------------
* | 16bit offset Address | Control Bits | Data Phase
*
* The 8bits Control Phase is reconfigured with Block Select bits (BSB[4:0]),
* Read/Write Access Mode bit (RWB) and SPI Operation Mode (OM[1:0]).
* Block Select bits select a block as like common register, socket register, tx buffer and tx buffer.
* Address value is defined as 16bit offset Address, BSB[4:0] and the three bits of zero-padding.(The RWB and OM [1:0] are '0 'padding)
* Please, refer to W5500 datasheet for more detail about Memory Map.
*
*/
/**
@brief Mode Register address
*/
#define MR (0x000000)
/**
@brief Gateway IP Register address
*/
#define GAR0 (0x000100)
#define GAR1 (0x000200)
#define GAR2 (0x000300)
#define GAR3 (0x000400)
/**
@brief Subnet mask Register address
*/
#define SUBR0 (0x000500)
#define SUBR1 (0x000600)
#define SUBR2 (0x000700)
#define SUBR3 (0x000800)
/**
@brief Source MAC Register address
*/
#define SHAR0 (0x000900)
#define SHAR1 (0x000A00)
#define SHAR2 (0x000B00)
#define SHAR3 (0x000C00)
#define SHAR4 (0x000D00)
#define SHAR5 (0x000E00)
/**
@brief Source IP Register address
*/
#define SIPR0 (0x000F00)
#define SIPR1 (0x001000)
#define SIPR2 (0x001100)
#define SIPR3 (0x001200)
/**
@brief set Interrupt low level timer register address
*/
#define INTLEVEL0 (0x001300)
#define INTLEVEL1 (0x001400)
/**
@brief Interrupt Register
*/
#define IR (0x001500)
/**
@brief Interrupt mask register
*/
#define IMR (0x001600)
#define IM_IR7 0x80
#define IM_IR6 0x40
#define IM_IR5 0x20
#define IM_IR4 0x10
/**
@brief Socket Interrupt Register
*/
#define SIR (0x001700)
/**
@brief Socket Interrupt Mask Register
*/
#define SIMR (0x001800)
#define S7_IMR 0x80
#define S6_IMR 0x40
#define S5_IMR 0x20
#define S4_IMR 0x10
#define S3_IMR 0x08
#define S2_IMR 0x04
#define S1_IMR 0x02
#define S0_IMR 0x01
/**
@brief Timeout register address( 1 is 100us )
*/
#define RTR0 (0x001900)
#define RTR1 (0x001A00)
/**
@brief Retry count reigster
*/
#define WIZ_RCR (0x001B00)
/**
@briefPPP LCP Request Timer register in PPPoE mode
*/
#define PTIMER (0x001C00)
/**
@brief PPP LCP Magic number register in PPPoE mode
*/
#define PMAGIC (0x001D00)
/**
@brief PPP Destination MAC Register address
*/
#define PDHAR0 (0x001E00)
#define PDHAR1 (0x001F00)
#define PDHAR2 (0x002000)
#define PDHAR3 (0x002100)
#define PDHAR4 (0x002200)
#define PDHAR5 (0x002300)
/**
@brief PPP Session Identification Register
*/
#define PSID0 (0x002400)
#define PSID1 (0x002500)
/**
@brief PPP Maximum Segment Size(MSS) register
*/
#define PMR0 (0x002600)
#define PMR1 (0x002700)
/**
@brief Unreachable IP register address in UDP mode
*/
#define UIPR0 (0x002800)
#define UIPR1 (0x002900)
#define UIPR2 (0x002A00)
#define UIPR3 (0x002B00)
/**
@brief Unreachable Port register address in UDP mode
*/
#define UPORT0 (0x002C00)
#define UPORT1 (0x002D00)
/**
@brief PHY Configuration Register
*/
#define PHYCFGR (0x002E00)
#define RST_PHY 0x80
#define OPMODE 0x40
#define DPX 0x04
#define SPD 0x02
#define LINK 0x01
/**
@brief chip version register address
*/
#define VERSIONR (0x003900)
/**
@brief socket Mode register
*/
#define Sn_MR(ch) (0x000008 + (ch<<5))
/**
@brief channel Sn_CR register
*/
#define Sn_CR(ch) (0x000108 + (ch<<5))
/**
@brief channel interrupt register
*/
#define Sn_IR(ch) (0x000208 + (ch<<5))
/**
@brief channel status register
*/
#define Sn_SR(ch) (0x000308 + (ch<<5))
/**
@brief source port register
*/
#define Sn_PORT0(ch) (0x000408 + (ch<<5))
#define Sn_PORT1(ch) (0x000508 + (ch<<5))
/**
@brief Peer MAC register address
*/
#define Sn_DHAR0(ch) (0x000608 + (ch<<5))
#define Sn_DHAR1(ch) (0x000708 + (ch<<5))
#define Sn_DHAR2(ch) (0x000808 + (ch<<5))
#define Sn_DHAR3(ch) (0x000908 + (ch<<5))
#define Sn_DHAR4(ch) (0x000A08 + (ch<<5))
#define Sn_DHAR5(ch) (0x000B08 + (ch<<5))
/**
@brief Peer IP register address
*/
#define Sn_DIPR0(ch) (0x000C08 + (ch<<5))
#define Sn_DIPR1(ch) (0x000D08 + (ch<<5))
#define Sn_DIPR2(ch) (0x000E08 + (ch<<5))
#define Sn_DIPR3(ch) (0x000F08 + (ch<<5))
/**
@brief Peer port register address
*/
#define Sn_DPORT0(ch) (0x001008 + (ch<<5))
#define Sn_DPORT1(ch) (0x001108 + (ch<<5))
/**
@brief Maximum Segment Size(Sn_MSSR0) register address
*/
#define Sn_MSSR0(ch) (0x001208 + (ch<<5))
#define Sn_MSSR1(ch) (0x001308 + (ch<<5))
/**
@brief IP Type of Service(TOS) Register
*/
#define Sn_TOS(ch) (0x001508 + (ch<<5))
/**
@brief IP Time to live(TTL) Register
*/
#define Sn_TTL(ch) (0x001608 + (ch<<5))
/**
@brief Receive memory size reigster
*/
#define Sn_RXMEM_SIZE(ch) (0x001E08 + (ch<<5))
/**
@brief Transmit memory size reigster
*/
#define Sn_TXMEM_SIZE(ch) (0x001F08 + (ch<<5))
/**
@brief Transmit free memory size register
*/
#define Sn_TX_FSR0(ch) (0x002008 + (ch<<5))
#define Sn_TX_FSR1(ch) (0x002108 + (ch<<5))
/**
@brief Transmit memory read pointer register address
*/
#define Sn_TX_RD0(ch) (0x002208 + (ch<<5))
#define Sn_TX_RD1(ch) (0x002308 + (ch<<5))
/**
@brief Transmit memory write pointer register address
*/
#define Sn_TX_WR0(ch) (0x002408 + (ch<<5))
#define Sn_TX_WR1(ch) (0x002508 + (ch<<5))
/**
@brief Received data size register
*/
#define Sn_RX_RSR0(ch) (0x002608 + (ch<<5))
#define Sn_RX_RSR1(ch) (0x002708 + (ch<<5))
/**
@brief Read point of Receive memory
*/
#define Sn_RX_RD0(ch) (0x002808 + (ch<<5))
#define Sn_RX_RD1(ch) (0x002908 + (ch<<5))
/**
@brief Write point of Receive memory
*/
#define Sn_RX_WR0(ch) (0x002A08 + (ch<<5))
#define Sn_RX_WR1(ch) (0x002B08 + (ch<<5))
/**
@brief socket interrupt mask register
*/
#define Sn_IMR(ch) (0x002C08 + (ch<<5))
#define IMR_SENDOK 0x10
#define IMR_TIMEOUT 0x08
#define IMR_RECV 0x04
#define IMR_DISCON 0x02
#define IMR_CON 0x01
/**
@brief frag field value in IP header register
*/
#define Sn_FRAG(ch) (0x002D08 + (ch<<5))
/**
@brief Keep Timer register
*/
#define Sn_KPALVTR(ch) (0x002F08 + (ch<<5))
/* MODE register values */
#define MR_RST 0x80 /**< reset */
#define MR_WOL 0x20 /**< Wake on Lan */
#define MR_PB 0x10 /**< ping block */
#define MR_PPPOE 0x08 /**< enable pppoe */
#define MR_UDP_FARP 0x02 /**< enbale FORCE ARP */
/* IR register values */
#define IR_CONFLICT 0x80 /**< check ip confict */
#define IR_UNREACH 0x40 /**< get the destination unreachable message in UDP sending */
#define IR_PPPoE 0x20 /**< get the PPPoE close message */
#define IR_MAGIC 0x10 /**< get the magic packet interrupt */
/* Sn_MR values */
#define Sn_MR_CLOSE 0x00 /**< unused socket */
#define Sn_MR_TCP 0x01 /**< TCP */
#define Sn_MR_UDP 0x02 /**< UDP */
#define Sn_MR_IPRAW 0x03 /**< IP LAYER RAW SOCK */
#define Sn_MR_MACRAW 0x04 /**< MAC LAYER RAW SOCK */
#define Sn_MR_PPPOE 0x05 /**< PPPoE */
#define Sn_MR_UCASTB 0x10 /**< Unicast Block in UDP Multicating*/
#define Sn_MR_ND 0x20 /**< No Delayed Ack(TCP) flag */
#define Sn_MR_MC 0x20 /**< Multicast IGMP (UDP) flag */
#define Sn_MR_BCASTB 0x40 /**< Broadcast blcok in UDP Multicating */
#define Sn_MR_MULTI 0x80 /**< support UDP Multicating */
/* Sn_MR values on MACRAW MODE */
#define Sn_MR_MIP6N 0x10 /**< IPv6 packet Block */
#define Sn_MR_MMB 0x20 /**< IPv4 Multicasting Block */
//#define Sn_MR_BCASTB 0x40 /**< Broadcast blcok */
#define Sn_MR_MFEN 0x80 /**< support MAC filter enable */
/* Sn_CR values */
#define Sn_CR_OPEN 0x01 /**< initialize or open socket */
#define Sn_CR_LISTEN 0x02 /**< wait connection request in tcp mode(Server mode) */
#define Sn_CR_CONNECT 0x04 /**< send connection request in tcp mode(Client mode) */
#define Sn_CR_DISCON 0x08 /**< send closing reqeuset in tcp mode */
#define Sn_CR_CLOSE 0x10 /**< close socket */
#define Sn_CR_SEND 0x20 /**< update txbuf pointer, send data */
#define Sn_CR_SEND_MAC 0x21 /**< send data with MAC address, so without ARP process */
#define Sn_CR_SEND_KEEP 0x22 /**< send keep alive message */
#define Sn_CR_RECV 0x40 /**< update rxbuf pointer, recv data */
#ifdef __DEF_IINCHIP_PPP__
#define Sn_CR_PCON 0x23
#define Sn_CR_PDISCON 0x24
#define Sn_CR_PCR 0x25
#define Sn_CR_PCN 0x26
#define Sn_CR_PCJ 0x27
#endif
/* Sn_IR values */
#ifdef __DEF_IINCHIP_PPP__
#define Sn_IR_PRECV 0x80
#define Sn_IR_PFAIL 0x40
#define Sn_IR_PNEXT 0x20
#endif
#define Sn_IR_SEND_OK 0x10 /**< complete sending */
#define Sn_IR_TIMEOUT 0x08 /**< assert timeout */
#define Sn_IR_RECV 0x04 /**< receiving data */
#define Sn_IR_DISCON 0x02 /**< closed socket */
#define Sn_IR_CON 0x01 /**< established connection */
/* Sn_SR values */
#define SOCK_CLOSED 0x00 /**< closed */
#define SOCK_INIT 0x13 /**< init state */
#define SOCK_LISTEN 0x14 /**< listen state */
#define SOCK_SYNSENT 0x15 /**< connection state */
#define SOCK_SYNRECV 0x16 /**< connection state */
#define SOCK_ESTABLISHED 0x17 /**< success to connect */
#define SOCK_FIN_WAIT 0x18 /**< closing state */
#define SOCK_CLOSING 0x1A /**< closing state */
#define SOCK_TIME_WAIT 0x1B /**< closing state */
#define SOCK_CLOSE_WAIT 0x1C /**< closing state */
#define SOCK_LAST_ACK 0x1D /**< closing state */
#define SOCK_UDP 0x22 /**< udp socket */
#define SOCK_IPRAW 0x32 /**< ip raw mode socket */
#define SOCK_MACRAW 0x42 /**< mac raw mode socket */
#define SOCK_PPPOE 0x5F /**< pppoe socket */
/* IP PROTOCOL */
#define IPPROTO_IP 0 /**< Dummy for IP */
#define IPPROTO_ICMP 1 /**< Control message protocol */
#define IPPROTO_IGMP 2 /**< Internet group management protocol */
#define IPPROTO_GGP 3 /**< Gateway^2 (deprecated) */
#define IPPROTO_TCP 6 /**< TCP */
#define IPPROTO_PUP 12 /**< PUP */
#define IPPROTO_UDP 17 /**< UDP */
#define IPPROTO_IDP 22 /**< XNS idp */
#define IPPROTO_ND 77 /**< UNOFFICIAL net disk protocol */
#define IPPROTO_RAW 255 /**< Raw IP packet */
#define W5500_SCS GPIO_Pin_4 //定义W5500的CS引脚
#define W5500_SCS_PORT GPIOA
#define W5500_RST GPIO_Pin_0 //定义W5500的RST引脚
#define W5500_RST_PORT GPIOB
#define W5500_INT GPIO_Pin_1 //定义W5500的INT引脚
#define W5500_INT_PORT GPIOB
/*********************************************************
* iinchip access function
*********************************************************/
//----------------------------------define----------------------------//
//--------------------------function-------------------------------------//
void IINCHIP_WRITE( uint32 addrbsb, uint8 data);
uint8 IINCHIP_READ(uint32 addrbsb);
uint16 wiz_write_buf(uint32 addrbsb,uint8* buf,uint16 len);
uint16 wiz_read_buf(uint32 addrbsb, uint8* buf,uint16 len);
void iinchip_init(void); // reset iinchip
void sysinit(uint8 * tx_size, uint8 * rx_size); // setting tx/rx buf size
uint8 getISR(uint8 s);
void putISR(uint8 s, uint8 val);
uint16 getIINCHIP_RxMAX(uint8 s);
uint16 getIINCHIP_TxMAX(uint8 s);
void setMR(uint8 val);
void setRTR(uint16 timeout); // set retry duration for data transmission, connection, closing ...
void setRCR(uint8 retry); // set retry count (above the value, assert timeout interrupt)
void clearIR(uint8 mask); // clear interrupt
uint8 getIR( void );
void setSn_MSS(SOCKET s, uint16 Sn_MSSR); // set maximum segment size
uint8 getSn_IR(SOCKET s); // get socket interrupt status
uint8 getSn_SR(SOCKET s); // get socket status
uint16 getSn_TX_FSR(SOCKET s); // get socket TX free buf size
uint16 getSn_RX_RSR(SOCKET s); // get socket RX recv buf size
uint8 getSn_SR(SOCKET s);
void setSn_TTL(SOCKET s, uint8 ttl);
void send_data_processing(SOCKET s, uint8 *wizdata, uint16 len);
void recv_data_processing(SOCKET s, uint8 *wizdata, uint16 len);
void setGAR(uint8 * addr); // set gateway address
void setSUBR(uint8 * addr); // set subnet mask address
void setSHAR(uint8 * addr); // set local MAC address
void setSIPR(uint8 * addr); // set local IP address
void getGAR(uint8 * addr);
void getSUBR(uint8 * addr);
void getSHAR(uint8 * addr);
void getSIPR(uint8 * addr);
void setSn_IR(uint8 s, uint8 val);
void W5500_Run(void);
//----------------- Typedef -----------------------------//
typedef struct {
int (* initialize)(void);
unsigned char mac[6];
unsigned char ip[4];
unsigned char sub[4];
unsigned char gw[4];
}W5500_T;
//---------------- Extern -------------------------------//
extern W5500_T w5500;
/**
@brief WIZCHIP_OFFSET_INC on IINCHIP_READ/WRITE
* case1.
* IINCHIP_WRITE(RTR0,val);
* IINCHIP_WRITE(RTR1,val);
* case1.
* IINCHIP_WRITE(RTR0,val);
* IINCHIP_WRITE(WIZCHIP_OFFSET_INC(RTR0,1));
*/
//#define WIZCHIP_OFFSET_INC(ADDR, N) (ADDR + (N<<8)) //< Increase offset address
#endif