74 lines
4.1 KiB
C
74 lines
4.1 KiB
C
/**************************************************************************************
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* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
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* *
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* This file and the related binary are licensed under the following license: *
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* *
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* ARM Object Code and Header Files License, v1.0 Redistribution. *
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* *
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* Redistribution and use of object code, header files, and documentation, without *
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* modification, are permitted provided that the following conditions are met: *
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* *
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* 1) Redistributions must reproduce the above copyright notice and the *
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* following disclaimer in the documentation and/or other materials *
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* provided with the distribution. *
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* *
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* 2) Unless to the extent explicitly permitted by law, no reverse *
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* engineering, decompilation, or disassembly of is permitted. *
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* *
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* 3) Redistribution and use is permitted solely for the purpose of *
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* developing or executing applications that are targeted for use *
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* on an ARM-based product. *
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* *
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* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
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* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
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* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
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**************************************************************************************/
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#include <stdio.h>
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#include "SEGGER_RTT.h"
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#include "ssi_pal_types_plat.h"
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#if DX_LINUX_PLATFORM
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extern uint32_t g_free_mem_addr;
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extern uint32_t *g_test_stack_base_addr;
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extern uint32_t g_rom_base_addr;
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extern uint32_t g_env_rom_base_addr;
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#endif
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SaSiError_t mapEnvMemory(void);
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void unmapMemory(void);
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SaSiError_t integration_tests_setup(void);
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void integration_tests_clear(void);
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#define REG_BASE_ADR DX_BASE_CC
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#define REG_AREA_LEN 0x20000
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#define ENV_REG_BASE_ADR DX_BASE_ENV_REGS
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#define ENV_REG_AREA_LEN 0x20000
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#define SRAM_BASE_ADR 0
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#define TEST_DATA_START_ADDRESS sizeof(CRYS_RND_State_t)+sizeof(CRYS_RND_WorkBuff_t)
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/* Zynq EVBs have 1GB and we reserve the memory at offset 768M */
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#define FREE_MEM_BASE_ADR 0x20020000
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#define CONTIG_FREE_MEM 0x8000
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/* Free memory is dedicated for SW image storage */
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#define BOOT_FREE_MEM_BASE_ADR FREE_MEM_BASE_ADR
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#define BOOT_FREE_MEM_LEN 0x500000
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/* user space follows the free memory, and uses for stack and workspace memory */
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#define PTHREAD_STACK_BASE_ADR (FREE_MEM_BASE_ADR + CONTIG_FREE_MEM)
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#define PTHREAD_STACK_SIZE 16*1024
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#define WORKSPACE_BASE_ADDR (PTHREAD_STACK_BASE_ADR + PTHREAD_STACK_SIZE)
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#define INTEG_TEST_PRINT(...) SEGGER_RTT_printf(0, __VA_ARGS__)
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