245 lines
8.6 KiB
C
245 lines
8.6 KiB
C
/**
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* Copyright (c) 2016 - 2020, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "sdk_common.h"
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#if NRF_MODULE_ENABLED(NRF_BLOCK_DEV_RAM)
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#include "nrf_block_dev_ram.h"
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#include <inttypes.h>
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/**@file
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*
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* @ingroup nrf_block_dev
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* @{
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*
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* @brief This module implements block device API. It should be used as a reference block device.
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*/
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#if NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED
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#define NRF_LOG_LEVEL NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL
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#define NRF_LOG_INFO_COLOR NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR
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#define NRF_LOG_INST_DEBUG_COLOR NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR
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#else
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#define NRF_LOG_LEVEL 0
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#endif
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#include "nrf_log.h"
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static ret_code_t block_dev_ram_init(nrf_block_dev_t const * p_blk_dev,
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nrf_block_dev_ev_handler ev_handler,
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void const * p_context)
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{
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ASSERT(p_blk_dev);
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nrf_block_dev_ram_t const * p_ram_dev = CONTAINER_OF(p_blk_dev, nrf_block_dev_ram_t, block_dev);
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nrf_block_dev_ram_work_t * p_work = p_ram_dev->p_work;
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NRF_LOG_INST_DEBUG(p_ram_dev->p_log, "Init");
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/* Calculate block device geometry.... */
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p_work->geometry.blk_size = p_ram_dev->ram_config.block_size;
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p_work->geometry.blk_count = p_ram_dev->ram_config.size /
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p_ram_dev->ram_config.block_size;
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p_work->p_context = p_context;
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p_work->ev_handler = ev_handler;
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if (p_work->ev_handler)
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{
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/*Asynchronous operation (simulation)*/
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const nrf_block_dev_event_t ev = {
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NRF_BLOCK_DEV_EVT_INIT,
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NRF_BLOCK_DEV_RESULT_SUCCESS,
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NULL,
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p_work->p_context
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};
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p_work->ev_handler(p_blk_dev, &ev);
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}
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return NRF_SUCCESS;
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}
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static ret_code_t block_dev_ram_uninit(nrf_block_dev_t const * p_blk_dev)
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{
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ASSERT(p_blk_dev);
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nrf_block_dev_ram_t const * p_ram_dev = CONTAINER_OF(p_blk_dev, nrf_block_dev_ram_t, block_dev);
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nrf_block_dev_ram_work_t * p_work = p_ram_dev->p_work;
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NRF_LOG_INST_DEBUG(p_ram_dev->p_log, "Uninit");
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if (p_work->ev_handler)
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{
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/*Asynchronous operation (simulation)*/
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const nrf_block_dev_event_t ev = {
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NRF_BLOCK_DEV_EVT_UNINIT,
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NRF_BLOCK_DEV_RESULT_SUCCESS,
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NULL,
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p_work->p_context
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};
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p_work->ev_handler(p_blk_dev, &ev);
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}
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memset(p_work, 0, sizeof(nrf_block_dev_ram_work_t));
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return NRF_SUCCESS;
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}
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static ret_code_t block_dev_ram_req(nrf_block_dev_t const * p_blk_dev,
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nrf_block_req_t const * p_blk,
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nrf_block_dev_event_type_t event)
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{
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ASSERT(p_blk_dev);
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ASSERT(p_blk);
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nrf_block_dev_ram_t const * p_ram_dev = CONTAINER_OF(p_blk_dev, nrf_block_dev_ram_t, block_dev);
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nrf_block_dev_ram_config_t const * p_ram_config = &p_ram_dev->ram_config;
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nrf_block_dev_ram_work_t const * p_work = p_ram_dev->p_work;
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NRF_LOG_INST_DEBUG(p_ram_dev->p_log,
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((event == NRF_BLOCK_DEV_EVT_BLK_READ_DONE) ?
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"Read req from block %"PRIu32" size %"PRIu32"(x%"PRIu32") to %"PRIXPTR
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:
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"Write req to block %"PRIu32" size %"PRIu32"(x%"PRIu32") from %"PRIXPTR),
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p_blk->blk_id,
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p_blk->blk_count,
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p_blk_dev->p_ops->geometry(p_blk_dev)->blk_size,
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p_blk->p_buff);
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if ((p_blk->blk_id + p_blk->blk_count) > p_work->geometry.blk_count)
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{
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NRF_LOG_INST_ERROR(p_ram_dev->p_log,
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((event == NRF_BLOCK_DEV_EVT_BLK_READ_DONE) ?
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"Out of range read req block %"PRIu32" count %"PRIu32" while max is %"PRIu32
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:
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"Out of range write req block %"PRIu32" count %"PRIu32", while max is %"PRIu32),
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p_blk->blk_id,
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p_blk->blk_count,
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p_blk_dev->p_ops->geometry(p_blk_dev)->blk_count);
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return NRF_ERROR_INVALID_ADDR;
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}
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/*Synchronous operation*/
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uint8_t * p_buff = p_ram_config->p_work_buffer;
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p_buff += p_blk->blk_id * p_work->geometry.blk_size;
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const void * p_src = (event == NRF_BLOCK_DEV_EVT_BLK_READ_DONE) ? p_buff : p_blk->p_buff;
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void * p_dst = (event == NRF_BLOCK_DEV_EVT_BLK_READ_DONE) ? p_blk->p_buff : p_buff;
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memcpy(p_dst, p_src, p_work->geometry.blk_size * p_blk->blk_count);
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if (p_work->ev_handler)
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{
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/*Asynchronous operation (simulation)*/
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const nrf_block_dev_event_t ev = {
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event,
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NRF_BLOCK_DEV_RESULT_SUCCESS,
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p_blk,
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p_work->p_context
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};
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p_work->ev_handler(p_blk_dev, &ev);
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}
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return NRF_SUCCESS;
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}
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static ret_code_t block_dev_ram_read_req(nrf_block_dev_t const * p_blk_dev,
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nrf_block_req_t const * p_blk)
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{
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return block_dev_ram_req(p_blk_dev, p_blk, NRF_BLOCK_DEV_EVT_BLK_READ_DONE);
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}
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static ret_code_t block_dev_ram_write_req(nrf_block_dev_t const * p_blk_dev,
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nrf_block_req_t const * p_blk)
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{
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return block_dev_ram_req(p_blk_dev, p_blk, NRF_BLOCK_DEV_EVT_BLK_WRITE_DONE);
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}
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static ret_code_t block_dev_ram_ioctl(nrf_block_dev_t const * p_blk_dev,
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nrf_block_dev_ioctl_req_t req,
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void * p_data)
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{
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nrf_block_dev_ram_t const * p_ram_dev = CONTAINER_OF(p_blk_dev, nrf_block_dev_ram_t, block_dev);
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switch (req)
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{
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case NRF_BLOCK_DEV_IOCTL_REQ_CACHE_FLUSH:
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{
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bool * p_flushing = p_data;
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NRF_LOG_INST_DEBUG(p_ram_dev->p_log, "IOCtl: Cache flush");
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if (p_flushing)
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{
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*p_flushing = false;
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}
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return NRF_SUCCESS;
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}
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case NRF_BLOCK_DEV_IOCTL_REQ_INFO_STRINGS:
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{
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if (p_data == NULL)
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{
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return NRF_ERROR_INVALID_PARAM;
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}
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nrf_block_dev_info_strings_t const * * pp_strings = p_data;
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*pp_strings = &p_ram_dev->info_strings;
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return NRF_SUCCESS;
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}
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default:
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break;
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}
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return NRF_ERROR_NOT_SUPPORTED;
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}
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static nrf_block_dev_geometry_t const * block_dev_ram_geometry(nrf_block_dev_t const * p_blk_dev)
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{
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ASSERT(p_blk_dev);
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nrf_block_dev_ram_t const * p_ram_dev = CONTAINER_OF(p_blk_dev, nrf_block_dev_ram_t, block_dev);
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nrf_block_dev_ram_work_t const * p_work = p_ram_dev->p_work;
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return &p_work->geometry;
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}
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const nrf_block_dev_ops_t nrf_block_device_ram_ops = {
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.init = block_dev_ram_init,
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.uninit = block_dev_ram_uninit,
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.read_req = block_dev_ram_read_req,
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.write_req = block_dev_ram_write_req,
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.ioctl = block_dev_ram_ioctl,
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.geometry = block_dev_ram_geometry,
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};
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/** @} */
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#endif // NRF_MODULE_ENABLED(NRF_BLOCK_DEV_RAM)
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