830 lines
28 KiB
C
830 lines
28 KiB
C
/**
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* Copyright (c) 2016 - 2020, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "sdk_common.h"
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#if NRF_MODULE_ENABLED(NRF_BLOCK_DEV_QSPI)
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#include "nrf_serial_flash_params.h"
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#include "nrf_block_dev_qspi.h"
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#include <inttypes.h>
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/**@file
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*
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* @ingroup nrf_block_dev_qspi
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* @{
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*
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* @brief This module implements block device API. It should be used as a reference block device.
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*/
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#if NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED
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#define NRF_LOG_LEVEL NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL
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#define NRF_LOG_INFO_COLOR NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR
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#define NRF_LOG_DEBUG_COLOR NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR
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#else
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#define NRF_LOG_LEVEL 0
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#endif
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#include "nrf_log.h"
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#define QSPI_STD_CMD_WRSR 0x01 /**< Write status register command*/
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#define QSPI_STD_CMD_RSTEN 0x66 /**< Reset enable command*/
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#define QSPI_STD_CMD_RST 0x99 /**< Reset command*/
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#define QSPI_STD_CMD_READ_ID 0x9F /**< Read ID command*/
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#define BD_PAGE_PROGRAM_SIZE 256 /**< Page program size (minimum block size)*/
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#define BD_ERASE_UNIT_INVALID_ID 0xFFFFFFFF /**< Invalid erase unit number*/
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#define BD_ERASE_UNIT_ERASE_VAL 0xFFFFFFFF /**< Erased memory value*/
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/**
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* @brief Block to erase unit translation
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*
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* @param blk_id Block index
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* @param blk_size Block size
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* */
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#define BD_BLOCK_TO_ERASEUNIT(blk_id, blk_size) \
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((blk_id) * (blk_size)) / (NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE)
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/**
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* @brief Blocks per erase unit
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*
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* @param blk_size Block size
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* */
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#define BD_BLOCKS_PER_ERASEUNIT(blk_size) \
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(NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE / (blk_size))
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static ret_code_t block_dev_qspi_eunit_write(nrf_block_dev_qspi_t const * p_qspi_dev,
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nrf_block_req_t * p_blk_left);
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static void block_dev_qspi_read_from_eunit(nrf_block_dev_qspi_t const * p_qspi_dev)
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{
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nrf_block_dev_qspi_work_t const * p_work = p_qspi_dev->p_work;
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/*In write-back mode data that we read might not be the same as in erase unit buffer*/
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uint32_t eunit_start = BD_BLOCK_TO_ERASEUNIT(p_work->req.blk_id,
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p_work->geometry.blk_size);
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uint32_t eunit_end = BD_BLOCK_TO_ERASEUNIT(p_work->req.blk_id + p_work->req.blk_count,
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p_work->geometry.blk_size);
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if ((eunit_start > p_work->erase_unit_idx) || (eunit_end < p_work->erase_unit_idx))
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{
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/*Do nothing. Read request doesn't hit current cached erase unit*/
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return;
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}
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/*Case 1: Copy data from start erase unit*/
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if (eunit_start == p_work->erase_unit_idx)
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{
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size_t blk = p_work->req.blk_id %
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BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size);
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size_t cnt = BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size) - blk;
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size_t off = p_work->geometry.blk_size * blk;
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if (cnt > p_work->req.blk_count)
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{
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cnt = p_work->req.blk_count;
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}
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memcpy(p_work->req.p_buff,
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p_work->p_erase_unit_buff + off,
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cnt * p_work->geometry.blk_size);
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return;
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}
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/*Case 2: Copy data from end erase unit*/
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if (eunit_end == p_work->erase_unit_idx)
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{
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size_t cnt = (p_work->req.blk_id + p_work->req.blk_count) %
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BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size);
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size_t off = (p_work->erase_unit_idx * BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size) -
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p_work->req.blk_id) * p_work->geometry.blk_size;
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if (cnt > p_work->req.blk_count)
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{
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cnt = p_work->req.blk_count;
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}
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memcpy((uint8_t *)p_work->req.p_buff + off,
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p_work->p_erase_unit_buff,
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cnt * p_work->geometry.blk_size);
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return;
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}
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/*Case 3: Copy data from eunit_start < p_work->erase_unit_idx < eunit_end*/
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size_t off = (p_work->erase_unit_idx * BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size) -
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p_work->req.blk_id) * p_work->geometry.blk_size;
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memcpy((uint8_t *)p_work->req.p_buff + off,
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p_work->p_erase_unit_buff,
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NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE);
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}
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/**
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* @brief Active QSPI block device handle. Only one instance.
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* */
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static nrf_block_dev_qspi_t const * m_active_qspi_dev;
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static void qspi_handler(nrf_drv_qspi_evt_t event, void * p_context)
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{
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if (m_active_qspi_dev != p_context)
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{
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return;
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}
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nrf_block_dev_qspi_t const * p_qspi_dev = p_context;
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nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
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nrf_block_req_t * p_blk_left = &p_work->left_req;
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switch (p_work->state)
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{
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case NRF_BLOCK_DEV_QSPI_STATE_READ_EXEC:
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{
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if (p_work->writeback_mode)
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{
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block_dev_qspi_read_from_eunit(p_qspi_dev);
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}
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p_work->state = NRF_BLOCK_DEV_QSPI_STATE_IDLE;
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if (p_work->ev_handler)
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{
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const nrf_block_dev_event_t ev = {
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NRF_BLOCK_DEV_EVT_BLK_READ_DONE,
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NRF_BLOCK_DEV_RESULT_SUCCESS,
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&p_work->req,
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p_work->p_context
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};
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p_work->ev_handler(&p_qspi_dev->block_dev, &ev);
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}
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break;
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}
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case NRF_BLOCK_DEV_QSPI_STATE_EUNIT_LOAD:
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{
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ret_code_t ret;
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uint32_t erase_unit = BD_BLOCK_TO_ERASEUNIT(p_blk_left->blk_id,
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p_work->geometry.blk_size);
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UNUSED_VARIABLE(erase_unit);
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ASSERT(erase_unit == p_work->erase_unit_idx);
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/* Check if block is in erase unit buffer*/
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ret = block_dev_qspi_eunit_write(p_qspi_dev, p_blk_left);
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ASSERT(ret == NRF_SUCCESS);
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UNUSED_VARIABLE(ret);
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break;
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}
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case NRF_BLOCK_DEV_QSPI_STATE_WRITE_ERASE:
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case NRF_BLOCK_DEV_QSPI_STATE_WRITE_EXEC:
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{
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/*Clear last programmed block*/
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uint32_t block_to_program = __CLZ(__RBIT(p_work->erase_unit_dirty_blocks));
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if (p_work->state == NRF_BLOCK_DEV_QSPI_STATE_WRITE_EXEC)
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{
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p_work->erase_unit_dirty_blocks ^= 1u << block_to_program;
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}
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if (p_work->erase_unit_dirty_blocks == 0)
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{
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if (p_work->left_req.blk_count)
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{
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/*Load next erase unit*/
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ret_code_t ret;
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uint32_t eunit = BD_BLOCK_TO_ERASEUNIT(p_blk_left->blk_id,
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p_work->geometry.blk_size);
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p_work->erase_unit_idx = eunit;
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p_work->state = NRF_BLOCK_DEV_QSPI_STATE_EUNIT_LOAD;
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ret = nrf_drv_qspi_read(p_work->p_erase_unit_buff,
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NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE,
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p_work->erase_unit_idx *
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NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE);
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UNUSED_VARIABLE(ret);
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break;
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}
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/*All blocks are programmed. Call event handler if required.*/
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p_work->state = NRF_BLOCK_DEV_QSPI_STATE_IDLE;
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if (p_work->ev_handler && !p_work->cache_flushing)
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{
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const nrf_block_dev_event_t ev = {
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NRF_BLOCK_DEV_EVT_BLK_WRITE_DONE,
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NRF_BLOCK_DEV_RESULT_SUCCESS,
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&p_work->req,
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p_work->p_context
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};
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p_work->ev_handler(&p_qspi_dev->block_dev, &ev);
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}
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p_work->cache_flushing = false;
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break;
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}
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/*Get next block to program from program mask*/
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block_to_program = __CLZ(__RBIT(p_work->erase_unit_dirty_blocks));
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uint32_t dst_address = (p_work->erase_unit_idx * NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE) +
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(block_to_program * p_work->geometry.blk_size);
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const void * p_src_address = p_work->p_erase_unit_buff +
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block_to_program * p_work->geometry.blk_size;
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p_work->state = NRF_BLOCK_DEV_QSPI_STATE_WRITE_EXEC;
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ret_code_t ret = nrf_drv_qspi_write(p_src_address,
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p_work->geometry.blk_size,
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dst_address);
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UNUSED_VARIABLE(ret);
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break;
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}
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default:
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ASSERT(0);
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break;
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}
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}
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static void wait_for_idle(nrf_block_dev_qspi_t const * p_qspi_dev)
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{
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nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
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while (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE)
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{
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__WFI();
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}
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}
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static ret_code_t block_dev_qspi_init(nrf_block_dev_t const * p_blk_dev,
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nrf_block_dev_ev_handler ev_handler,
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void const * p_context)
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{
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ASSERT(p_blk_dev);
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nrf_block_dev_qspi_t const * p_qspi_dev =
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CONTAINER_OF(p_blk_dev, nrf_block_dev_qspi_t, block_dev);
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nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
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nrf_drv_qspi_config_t const * p_qspi_cfg = &p_qspi_dev->qspi_bdev_config.qspi_config;
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ret_code_t ret = NRF_SUCCESS;
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NRF_LOG_INST_DEBUG(p_qspi_dev->p_log, "Init");
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if (p_qspi_dev->qspi_bdev_config.block_size % BD_PAGE_PROGRAM_SIZE)
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{
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/*Unsupported block size*/
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Unsupported block size because of program page size");
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return NRF_ERROR_NOT_SUPPORTED;
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}
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if (NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE % p_qspi_dev->qspi_bdev_config.block_size)
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{
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/*Unsupported block size*/
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Unsupported block size because of erase unit size");
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return NRF_ERROR_NOT_SUPPORTED;
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}
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if (m_active_qspi_dev)
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{
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/* QSPI instance is BUSY*/
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Cannot init because QSPI is busy");
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return NRF_ERROR_BUSY;
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}
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ret = nrf_drv_qspi_init(p_qspi_cfg, qspi_handler, (void *)p_blk_dev);
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if (ret != NRF_SUCCESS)
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI init error: %"PRIu32"", ret);
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return ret;
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}
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nrf_qspi_cinstr_conf_t cinstr_cfg = {
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.opcode = QSPI_STD_CMD_RSTEN,
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.length = NRF_QSPI_CINSTR_LEN_1B,
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.io2_level = true,
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.io3_level = true,
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.wipwait = true,
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.wren = true
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};
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/* Send reset enable */
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ret = nrf_drv_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
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if (ret != NRF_SUCCESS)
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI reset enable command error: %"PRIu32"", ret);
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return ret;
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}
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/* Send reset command */
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cinstr_cfg.opcode = QSPI_STD_CMD_RST;
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ret = nrf_drv_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
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if (ret != NRF_SUCCESS)
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI reset command error: %"PRIu32"", ret);
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return ret;
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}
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/* Get 3 byte identification value */
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uint8_t rdid_buf[3] = {0, 0, 0};
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cinstr_cfg.opcode = QSPI_STD_CMD_READ_ID;
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cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_4B;
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ret = nrf_drv_qspi_cinstr_xfer(&cinstr_cfg, NULL, rdid_buf);
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if (ret != NRF_SUCCESS)
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI get 3 byte id error: %"PRIu32"", ret);
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return ret;
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}
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nrf_serial_flash_params_t const * serial_flash_id = nrf_serial_flash_params_get(rdid_buf);
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if (!serial_flash_id)
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI FLASH not supported");
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return NRF_ERROR_NOT_SUPPORTED;
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}
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if (serial_flash_id->erase_size != NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE)
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI FLASH erase unit size not supported");
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return NRF_ERROR_NOT_SUPPORTED;
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}
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/* Calculate block device geometry.... */
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uint32_t blk_size = p_qspi_dev->qspi_bdev_config.block_size;
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uint32_t blk_count = serial_flash_id->size / p_qspi_dev->qspi_bdev_config.block_size;
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if (!blk_count || (blk_count % BD_BLOCKS_PER_ERASEUNIT(blk_size)))
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{
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI FLASH block size not supported");
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return NRF_ERROR_NOT_SUPPORTED;
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}
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p_work->geometry.blk_size = blk_size;
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p_work->geometry.blk_count = blk_count;
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p_work->p_context = p_context;
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p_work->ev_handler = ev_handler;
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p_work->state = NRF_BLOCK_DEV_QSPI_STATE_IDLE;
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p_work->erase_unit_idx = BD_ERASE_UNIT_INVALID_ID;
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p_work->writeback_mode = (p_qspi_dev->qspi_bdev_config.flags &
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NRF_BLOCK_DEV_QSPI_FLAG_CACHE_WRITEBACK) != 0;
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m_active_qspi_dev = p_qspi_dev;
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if (p_work->ev_handler)
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{
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/*Asynchronous operation (simulation)*/
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const nrf_block_dev_event_t ev = {
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NRF_BLOCK_DEV_EVT_INIT,
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NRF_BLOCK_DEV_RESULT_SUCCESS,
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NULL,
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p_work->p_context
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};
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p_work->ev_handler(p_blk_dev, &ev);
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}
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return NRF_SUCCESS;
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}
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static ret_code_t block_dev_qspi_uninit(nrf_block_dev_t const * p_blk_dev)
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{
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ASSERT(p_blk_dev);
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nrf_block_dev_qspi_t const * p_qspi_dev =
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CONTAINER_OF(p_blk_dev, nrf_block_dev_qspi_t, block_dev);
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nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
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NRF_LOG_INST_DEBUG(p_qspi_dev->p_log, "Uninit");
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if (m_active_qspi_dev != p_qspi_dev)
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{
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/* QSPI instance is BUSY*/
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return NRF_ERROR_BUSY;
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}
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if (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE)
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{
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/* Previous asynchronous operation in progress*/
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NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Cannot uninit because QSPI is busy");
|
|
return NRF_ERROR_BUSY;
|
|
}
|
|
|
|
if (p_work->ev_handler)
|
|
{
|
|
/*Asynchronous operation*/
|
|
const nrf_block_dev_event_t ev = {
|
|
NRF_BLOCK_DEV_EVT_UNINIT,
|
|
NRF_BLOCK_DEV_RESULT_SUCCESS,
|
|
NULL,
|
|
p_work->p_context
|
|
};
|
|
|
|
p_work->ev_handler(p_blk_dev, &ev);
|
|
}
|
|
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_DISABLED;
|
|
nrf_drv_qspi_uninit();
|
|
|
|
memset(p_work, 0, sizeof(nrf_block_dev_qspi_work_t));
|
|
m_active_qspi_dev = NULL;
|
|
return NRF_SUCCESS;
|
|
}
|
|
|
|
static ret_code_t block_dev_qspi_read_req(nrf_block_dev_t const * p_blk_dev,
|
|
nrf_block_req_t const * p_blk)
|
|
{
|
|
ASSERT(p_blk_dev);
|
|
ASSERT(p_blk);
|
|
nrf_block_dev_qspi_t const * p_qspi_dev =
|
|
CONTAINER_OF(p_blk_dev, nrf_block_dev_qspi_t, block_dev);
|
|
nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
|
|
|
|
ret_code_t ret = NRF_SUCCESS;
|
|
|
|
NRF_LOG_INST_DEBUG(
|
|
p_qspi_dev->p_log,
|
|
"Read req from block %"PRIu32" size %"PRIu32"(x%"PRIu32") to %"PRIXPTR,
|
|
p_blk->blk_id,
|
|
p_blk->blk_count,
|
|
p_blk_dev->p_ops->geometry(p_blk_dev)->blk_size,
|
|
p_blk->p_buff);
|
|
|
|
if ((p_blk->blk_id + p_blk->blk_count) > p_work->geometry.blk_count)
|
|
{
|
|
NRF_LOG_INST_ERROR(
|
|
p_qspi_dev->p_log,
|
|
"Out of range read req block %"PRIu32" count %"PRIu32" while max is %"PRIu32,
|
|
p_blk->blk_id,
|
|
p_blk->blk_count,
|
|
p_blk_dev->p_ops->geometry(p_blk_dev)->blk_count);
|
|
return NRF_ERROR_INVALID_ADDR;
|
|
}
|
|
|
|
if (m_active_qspi_dev != p_qspi_dev)
|
|
{
|
|
/* QSPI instance is BUSY*/
|
|
NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Cannot read because QSPI is busy");
|
|
return NRF_ERROR_BUSY;
|
|
}
|
|
|
|
if (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE)
|
|
{
|
|
/* Previous asynchronous operation in progress*/
|
|
NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Cannot read because of ongoing previous operation");
|
|
return NRF_ERROR_BUSY;
|
|
}
|
|
|
|
p_work->left_req = *p_blk;
|
|
p_work->req = *p_blk;
|
|
nrf_block_req_t * p_blk_left = &p_work->left_req;
|
|
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_READ_EXEC;
|
|
ret = nrf_drv_qspi_read(p_blk_left->p_buff,
|
|
p_blk_left->blk_count * p_work->geometry.blk_size,
|
|
p_blk_left->blk_id * p_work->geometry.blk_size);
|
|
|
|
if (ret != NRF_SUCCESS)
|
|
{
|
|
NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI read error: %"PRIu32"", ret);
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_IDLE;
|
|
return ret;
|
|
}
|
|
|
|
p_blk_left->p_buff = NULL;
|
|
p_blk_left->blk_count = 0;
|
|
|
|
if (!p_work->ev_handler && (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE))
|
|
{
|
|
/*Synchronous operation*/
|
|
wait_for_idle(p_qspi_dev);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static bool block_dev_qspi_update_eunit(nrf_block_dev_qspi_t const * p_qspi_dev,
|
|
size_t off,
|
|
const void * p_src,
|
|
size_t len)
|
|
{
|
|
ASSERT((len % sizeof(uint32_t)) == 0)
|
|
nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
|
|
|
|
uint32_t * p_dst32 = (uint32_t *)(p_work->p_erase_unit_buff + off);
|
|
const uint32_t * p_src32 = p_src;
|
|
|
|
bool erase_required = false;
|
|
len /= sizeof(uint32_t);
|
|
|
|
/*Do normal copying until erase unit is not required*/
|
|
do
|
|
{
|
|
if (*p_dst32 != *p_src32)
|
|
{
|
|
if (*p_dst32 != BD_ERASE_UNIT_ERASE_VAL)
|
|
{
|
|
erase_required = true;
|
|
}
|
|
|
|
/*Mark block as dirty*/
|
|
p_work->erase_unit_dirty_blocks |= 1u << (off / p_work->geometry.blk_size);
|
|
}
|
|
|
|
*p_dst32++ = *p_src32++;
|
|
off += sizeof(uint32_t);
|
|
} while (--len);
|
|
|
|
return erase_required;
|
|
}
|
|
|
|
static ret_code_t block_dev_qspi_write_start(nrf_block_dev_qspi_t const * p_qspi_dev)
|
|
{
|
|
nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
|
|
|
|
if (!p_work->erase_required)
|
|
{
|
|
/*Get first block to program from program mask*/
|
|
uint32_t block_to_program = __CLZ(__RBIT(p_work->erase_unit_dirty_blocks));
|
|
uint32_t dst_address = (p_work->erase_unit_idx * NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE) +
|
|
(block_to_program * p_work->geometry.blk_size);
|
|
|
|
const void * p_src_address = p_work->p_erase_unit_buff +
|
|
block_to_program * p_work->geometry.blk_size;
|
|
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_WRITE_EXEC;
|
|
return nrf_drv_qspi_write(p_src_address,
|
|
p_work->geometry.blk_size,
|
|
dst_address);
|
|
}
|
|
|
|
/*Erase is required*/
|
|
uint32_t address = (p_work->erase_unit_idx * NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE);
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_WRITE_ERASE;
|
|
p_work->erase_required = false;
|
|
|
|
return nrf_drv_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, address);
|
|
}
|
|
|
|
static ret_code_t block_dev_qspi_eunit_write(nrf_block_dev_qspi_t const * p_qspi_dev,
|
|
nrf_block_req_t * p_blk_left)
|
|
{
|
|
nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
|
|
|
|
size_t blk = p_blk_left->blk_id %
|
|
BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size);
|
|
size_t cnt = BD_BLOCKS_PER_ERASEUNIT(p_work->geometry.blk_size) - blk;
|
|
size_t off = p_work->geometry.blk_size * blk;
|
|
|
|
if (cnt > p_blk_left->blk_count)
|
|
{
|
|
cnt = p_blk_left->blk_count;
|
|
}
|
|
|
|
bool erase_required = block_dev_qspi_update_eunit(p_qspi_dev,
|
|
off,
|
|
p_blk_left->p_buff,
|
|
cnt * p_work->geometry.blk_size);
|
|
if (erase_required)
|
|
{
|
|
p_work->erase_required = true;
|
|
}
|
|
|
|
p_blk_left->blk_count -= cnt;
|
|
p_blk_left->blk_id += cnt;
|
|
p_blk_left->p_buff = (uint8_t *)p_blk_left->p_buff + cnt * p_work->geometry.blk_size;
|
|
|
|
if (p_work->erase_required)
|
|
{
|
|
uint32_t blk_size = p_work->geometry.blk_size;
|
|
p_work->erase_unit_dirty_blocks |= (1u << BD_BLOCKS_PER_ERASEUNIT(blk_size)) - 1;
|
|
}
|
|
|
|
if (p_work->erase_unit_dirty_blocks == 0 || p_work->writeback_mode)
|
|
{
|
|
/*No dirty blocks detected. Write end.*/
|
|
if (p_work->ev_handler && p_blk_left->blk_count == 0)
|
|
{
|
|
const nrf_block_dev_event_t ev = {
|
|
NRF_BLOCK_DEV_EVT_BLK_WRITE_DONE,
|
|
NRF_BLOCK_DEV_RESULT_SUCCESS,
|
|
&p_work->req,
|
|
p_work->p_context
|
|
};
|
|
|
|
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_IDLE;
|
|
p_work->ev_handler(&p_qspi_dev->block_dev, &ev);
|
|
return NRF_SUCCESS;
|
|
}
|
|
}
|
|
|
|
return block_dev_qspi_write_start(p_qspi_dev);
|
|
}
|
|
|
|
static ret_code_t block_dev_qspi_write_req(nrf_block_dev_t const * p_blk_dev,
|
|
nrf_block_req_t const * p_blk)
|
|
{
|
|
ASSERT(p_blk_dev);
|
|
ASSERT(p_blk);
|
|
nrf_block_dev_qspi_t const * p_qspi_dev =
|
|
CONTAINER_OF(p_blk_dev, nrf_block_dev_qspi_t, block_dev);
|
|
nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
|
|
|
|
ret_code_t ret = NRF_SUCCESS;
|
|
|
|
NRF_LOG_INST_DEBUG(
|
|
p_qspi_dev->p_log,
|
|
"Write req to block %"PRIu32" size %"PRIu32"(x%"PRIu32") from %"PRIXPTR,
|
|
p_blk->blk_id,
|
|
p_blk->blk_count,
|
|
p_blk_dev->p_ops->geometry(p_blk_dev)->blk_size,
|
|
p_blk->p_buff);
|
|
|
|
if ((p_blk->blk_id + p_blk->blk_count) > p_work->geometry.blk_count)
|
|
{
|
|
NRF_LOG_INST_ERROR(
|
|
p_qspi_dev->p_log,
|
|
"Out of range write req block %"PRIu32" count %"PRIu32" while max is %"PRIu32,
|
|
p_blk->blk_id,
|
|
p_blk->blk_count,
|
|
p_blk_dev->p_ops->geometry(p_blk_dev)->blk_count);
|
|
return NRF_ERROR_INVALID_ADDR;
|
|
}
|
|
|
|
if (m_active_qspi_dev != p_qspi_dev)
|
|
{
|
|
/* QSPI instance is BUSY*/
|
|
NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Cannot write because QSPI is busy");
|
|
return NRF_ERROR_BUSY;
|
|
}
|
|
|
|
if (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE)
|
|
{
|
|
/* Previous asynchronous operation in progress*/
|
|
NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "Cannot write because of ongoing previous operation");
|
|
return NRF_ERROR_BUSY;
|
|
}
|
|
|
|
p_work->left_req = *p_blk;
|
|
p_work->req = *p_blk;
|
|
|
|
nrf_block_req_t * p_blk_left = &p_work->left_req;
|
|
|
|
uint32_t erase_unit = BD_BLOCK_TO_ERASEUNIT(p_blk_left->blk_id,
|
|
p_work->geometry.blk_size);
|
|
|
|
/* Check if block is in erase unit buffer*/
|
|
if (erase_unit == p_work->erase_unit_idx)
|
|
{
|
|
ret = block_dev_qspi_eunit_write(p_qspi_dev, p_blk_left);
|
|
}
|
|
else
|
|
{
|
|
if (p_work->writeback_mode)
|
|
{
|
|
ret = block_dev_qspi_write_start(p_qspi_dev);
|
|
}
|
|
else
|
|
{
|
|
p_work->erase_unit_idx = erase_unit;
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_EUNIT_LOAD;
|
|
|
|
ret = nrf_drv_qspi_read(p_work->p_erase_unit_buff,
|
|
NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE,
|
|
erase_unit * NRF_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE);
|
|
}
|
|
}
|
|
|
|
if (ret != NRF_SUCCESS)
|
|
{
|
|
NRF_LOG_INST_ERROR(p_qspi_dev->p_log, "QSPI write error: %"PRIu32"", ret);
|
|
p_work->state = NRF_BLOCK_DEV_QSPI_STATE_IDLE;
|
|
return ret;
|
|
}
|
|
|
|
if (!p_work->ev_handler && (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE))
|
|
{
|
|
/*Synchronous operation*/
|
|
wait_for_idle(p_qspi_dev);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static ret_code_t block_dev_qspi_ioctl(nrf_block_dev_t const * p_blk_dev,
|
|
nrf_block_dev_ioctl_req_t req,
|
|
void * p_data)
|
|
{
|
|
ASSERT(p_blk_dev);
|
|
nrf_block_dev_qspi_t const * p_qspi_dev =
|
|
CONTAINER_OF(p_blk_dev, nrf_block_dev_qspi_t, block_dev);
|
|
nrf_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;
|
|
|
|
switch (req)
|
|
{
|
|
case NRF_BLOCK_DEV_IOCTL_REQ_CACHE_FLUSH:
|
|
{
|
|
bool * p_flushing = p_data;
|
|
NRF_LOG_INST_DEBUG(p_qspi_dev->p_log, "IOCtl: Cache flush");
|
|
if (p_work->state != NRF_BLOCK_DEV_QSPI_STATE_IDLE)
|
|
{
|
|
return NRF_ERROR_BUSY;
|
|
}
|
|
|
|
if (!p_work->writeback_mode || p_work->erase_unit_dirty_blocks == 0)
|
|
{
|
|
if (p_flushing)
|
|
{
|
|
*p_flushing = false;
|
|
}
|
|
|
|
return NRF_SUCCESS;
|
|
}
|
|
|
|
ret_code_t ret = block_dev_qspi_write_start(p_qspi_dev);
|
|
if (ret == NRF_SUCCESS)
|
|
{
|
|
if (p_flushing)
|
|
{
|
|
*p_flushing = true;
|
|
}
|
|
p_work->cache_flushing = true;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
case NRF_BLOCK_DEV_IOCTL_REQ_INFO_STRINGS:
|
|
{
|
|
if (p_data == NULL)
|
|
{
|
|
return NRF_ERROR_INVALID_PARAM;
|
|
}
|
|
|
|
nrf_block_dev_info_strings_t const * * pp_strings = p_data;
|
|
*pp_strings = &p_qspi_dev->info_strings;
|
|
return NRF_SUCCESS;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return NRF_ERROR_NOT_SUPPORTED;
|
|
}
|
|
|
|
static nrf_block_dev_geometry_t const * block_dev_qspi_geometry(nrf_block_dev_t const * p_blk_dev)
|
|
{
|
|
ASSERT(p_blk_dev);
|
|
nrf_block_dev_qspi_t const * p_qspi_dev =
|
|
CONTAINER_OF(p_blk_dev, nrf_block_dev_qspi_t, block_dev);
|
|
nrf_block_dev_qspi_work_t const * p_work = p_qspi_dev->p_work;
|
|
|
|
return &p_work->geometry;
|
|
}
|
|
|
|
const nrf_block_dev_ops_t nrf_block_device_qspi_ops = {
|
|
.init = block_dev_qspi_init,
|
|
.uninit = block_dev_qspi_uninit,
|
|
.read_req = block_dev_qspi_read_req,
|
|
.write_req = block_dev_qspi_write_req,
|
|
.ioctl = block_dev_qspi_ioctl,
|
|
.geometry = block_dev_qspi_geometry,
|
|
};
|
|
|
|
/** @} */
|
|
#endif // NRF_MODULE_ENABLED(NRF_BLOCK_DEV_QSPI)
|