181 lines
5.7 KiB
C
181 lines
5.7 KiB
C
/**
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* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef BH1745_INTERNAL_H
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#define BH1745_INTERNAL_H
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#include "nrf_twi_sensor.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Possible sensor addresses.
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*/
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#define BH1745_BASE_ADDRESS_LOW 0x38U
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#define BH1745_BASE_ADDRESS_HIGH 0x39U
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#define BH1745_MIN_QUEUE_SIZE 5
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/**
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* @brief Sensor registers.
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*/
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#define BH1745_REG_SYSTEM_CONTROL 0x40
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#define BH1745_REG_MODE_CONTROL1 0x41
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#define BH1745_REG_MODE_CONTROL2 0x42
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#define BH1745_REG_RED_DATA_LSB 0x50
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#define BH1745_REG_DINT_DATA_LSB 0x58
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#define BH1745_REG_INTERRUPT 0x60
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#define BH1745_REG_PERSISTENCE 0x61
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#define BH1745_REG_TH_LSB 0x62
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#define BH1745_REG_TL_LSB 0x64
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#define BH1745_REG_MANUFACTURER_ID 0x92
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#define BH1745_DATA_REG_NUM 8
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#define BH1745_MANU_ID 0xE0
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#define BH1745_PART_ID 0x0B
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/**
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* @brief System Control register bitmasks.
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*/
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// Default value for system control register.
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#define BH1745_DEF_SYSTEM_CONTROL 0x0B
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// Bitmasks for sw reset.
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#define BH1745_SW_RESET_POS 7
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#define BH1745_SW_RESET_MASK (1 << BH1745_SW_RESET_POS)
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// Bitmasks for int reset.
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#define BH1745_INT_RESET_POS 6
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#define BH1745_INT_RESET_MASK (1 << BH1745_INT_RESET_POS)
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// Bitmasks for part id.
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#define BH1745_PART_ID_POS 0
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#define BH1745_PART_ID_MASK (0x3F << BH1745_PART_ID_POS)
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/**
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* @brief Mode Control 1 register bitmasks.
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*/
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// Bitmasks for meas time.
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#define BH1745_MEAS_TIME_POS 0
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#define BH1745_MEAS_TIME_MASK (0x07 << BH1745_MEAS_TIME_POS)
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/**
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* @brief Mode Control 2 register bitmasks.
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*/
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// Bitmasks for valid.
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#define BH1745_VALID_POS 7
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#define BH1745_VALID_MASK (1 << BH1745_VALID_POS)
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// Bitmasks for rgbc en.
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#define BH1745_RGBC_EN_POS 4
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#define BH1745_RGBC_EN_MASK (1 << BH1745_RGBC_EN_POS)
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// Bitmasks for adc gain.
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#define BH1745_ADC_GAIN_POS 0
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#define BH1745_ADC_GAIN_MASK (3 << BH1745_ADC_GAIN_POS)
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/**
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* @brief Interrupt register bitmasks.
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*/
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// Bitmasks for int status.
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#define BH1745_INT_STATUS_POS 7
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#define BH1745_INT_STATUS_MASK (1 << BH1745_INT_STATUS_POS)
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// Bitmasks for int latch.
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#define BH1745_INT_LATCH_POS 4
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#define BH1745_INT_LATCH_MASK (1 << BH1745_INT_LATCH_POS)
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// Bitmasks for int source.
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#define BH1745_INT_SOURCE_POS 2
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#define BH1745_INT_SOURCE_MASK (3 << BH1745_INT_SOURCE_POS)
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// Bitmasks for int enable.
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#define BH1745_INT_ENABLE_POS 0
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#define BH1745_INT_ENABLE_MASK (1 << BH1745_INT_ENABLE_POS)
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/**
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* @brief Persistence register bitmasks.
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*/
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// Default value for persistence register.
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#define BH1745_DEF_PERSISTENCE 0x01
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// Bitmasks for persistence.
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#define BH1745_PERSISTENCE_POS 0
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#define BH1745_PERSISTENCE_MASK (3 << BH1745_PERSISTENCE_POS)
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// Default value for high threshold registers.
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#define BH1745_DEF_TH 0xFFFF
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/**
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* @brief Sensor instance information.
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*/
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typedef struct
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{
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nrf_twi_sensor_t * const p_sensor_data;
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uint8_t const sensor_addr;
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} bh1745_instance_t;
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#define BH1745_INTERNAL_INSTANCE_DEF(_bh1745_inst_name, _p_twi_sensor, _sensor_address) \
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static bh1745_instance_t _bh1745_inst_name = \
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{ \
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.p_sensor_data = _p_twi_sensor, \
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.sensor_addr = _sensor_address \
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}
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#ifdef __cplusplus
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}
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#endif
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#endif // BH1745_INTERNAL_H
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