初始版本
This commit is contained in:
xiaozhengsheng
31
external/infineon/pal/nrf5x/README.md
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31
external/infineon/pal/nrf5x/README.md
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# General
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All projects built with the nrf5x PAL need to set `DL_MAX_FRAME_SIZE=250` via
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a global define, because the nrf5x doesn't support the default frame size.
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To use the PAL together with other I2C devices and be able to run it also on a BLE Shield2Go
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make a global define `IFX_2GO_SUPPORT`.
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# Nordic SDK `nrf_crypto` backend
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To use the OPTIGA with the `nrf_crypto` API the Nordic SDK needs to be modified
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according to the following steps.
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Locate the folder <NRF_SDK>/components/libraries/crypto/. In each file listed in
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the following table locate the include statement section starting with the
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comment `// Include all backends`.
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Append the corresponding OPTIGA backend header file include statement at the end
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of each respective include block.
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|File |Include statement to append |
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|----------------------------|-----------------------------------|
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|`nrf_crypto_ecc_backend.h` |`#include "optiga_backend_ecc.h"` |
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|`nrf_crypto_ecdh_backend.h` |`#include "optiga_backend_ecdh.h"` |
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|`nrf_crypto_ecdsa_backend.h`|`#include "optiga_backend_ecdsa.h"`|
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|`nrf_crypto_rng_backend.h` |`#include "optiga_backend_rng.h"` |
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# Memory Allocation
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The library allocates memory on the heap. To ensure correct operation the heap
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must be sufficiently large, e.g. 8,192 Bytes.
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138
external/infineon/pal/nrf5x/pal_gpio.c
vendored
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138
external/infineon/pal/nrf5x/pal_gpio.c
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/**
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* MIT License
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||||
*
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* Copyright (c) 2018 Infineon Technologies AG
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE
|
||||
*
|
||||
*
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* \file
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*
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* \brief This file implements the platform abstraction layer APIs for gpio.
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*
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* \addtogroup grPAL
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* @{
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*/
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/**********************************************************************************************************************
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* HEADER FILES
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*********************************************************************************************************************/
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#include "optiga/pal/pal_gpio.h"
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#include "optiga/pal/pal_ifx_i2c_config.h"
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#include "nrf_gpio.h"
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#include "pal_pin_config.h"
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/**********************************************************************************************************************
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* MACROS
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*********************************************************************************************************************/
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/**********************************************************************************************************************
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* LOCAL DATA
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*********************************************************************************************************************/
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/**********************************************************************************************************************
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* LOCAL ROUTINES
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*********************************************************************************************************************/
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void setup_nrf_gpio(uint32_t pin)
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{
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// don't touch pin config for unused pins
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if (pin == OPTIGA_PIN_UNUSED) {
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return;
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}
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// remove our flags to allow nrf_gpio_* functions to work
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const uint32_t pin_nr = pin & ~OPTIGA_PIN_ALL_MASKS;
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// Init pin direction
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nrf_gpio_cfg_output(pin_nr);
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// Set pin to initial state
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nrf_gpio_pin_write(pin_nr, pin & OPTIGA_PIN_INITIAL_VAL_MASK);
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}
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void write_nrf_gpio(uint32_t pin, bool value)
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{
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// Skip pins marked for one time init or unused
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if ((pin == OPTIGA_PIN_UNUSED) || (pin & OPTIGA_PIN_ONE_TIME_INIT_MASK)) {
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return;
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}
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// remove our flags to allow nrf_gpio_* functions to work
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const uint32_t pin_nr = pin & ~OPTIGA_PIN_ALL_MASKS;
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nrf_gpio_pin_write(pin_nr, value);
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}
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/**********************************************************************************************************************
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* API IMPLEMENTATION
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*********************************************************************************************************************/
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pal_status_t pal_gpio_init(const pal_gpio_t * p_gpio_context)
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{
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const uint32_t vdd_pin = (uint32_t)(optiga_vdd_0.p_gpio_hw);
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const uint32_t rst_pin = (uint32_t)(optiga_reset_0.p_gpio_hw);
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setup_nrf_gpio(vdd_pin);
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setup_nrf_gpio(rst_pin);
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return PAL_STATUS_SUCCESS;
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}
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/**
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* Sets the gpio pin to high state
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*
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* <b>API Details:</b>
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* The API sets the pin high, only if the pin is assigned to a valid gpio context.<br>
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* Otherwise the API returns without any failure status.<br>
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*
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*\param[in] p_gpio_context Pointer to pal layer gpio context
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*
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*
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*/
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void pal_gpio_set_high(const pal_gpio_t* p_gpio_context)
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{
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if (p_gpio_context != NULL)
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{
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write_nrf_gpio((uint32_t)(p_gpio_context->p_gpio_hw), true);
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}
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}
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/**
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* Sets the gpio pin to low state
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*
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* <b>API Details:</b>
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* The API set the pin low, only if the pin is assigned to a valid gpio context.<br>
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* Otherwise the API returns without any failure status.<br>
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*
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*\param[in] p_gpio_context Pointer to pal layer gpio context
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*
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*/
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void pal_gpio_set_low(const pal_gpio_t* p_gpio_context)
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{
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if (p_gpio_context != NULL)
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{
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write_nrf_gpio((uint32_t)(p_gpio_context->p_gpio_hw), false);
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}
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}
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||||
/**
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||||
* @}
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||||
*/
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||||
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||||
360
external/infineon/pal/nrf5x/pal_i2c.c
vendored
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360
external/infineon/pal/nrf5x/pal_i2c.c
vendored
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@@ -0,0 +1,360 @@
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||||
/**
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Infineon Technologies AG
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE
|
||||
*
|
||||
*
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||||
* \file
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*
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* \brief This file implements the platform abstraction layer(pal) APIs for I2C.
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*
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||||
* \addtogroup grPAL
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* @{
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||||
*/
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||||
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/**********************************************************************************************************************
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* HEADER FILES
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*********************************************************************************************************************/
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#include "optiga/pal/pal_i2c.h"
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#include "optiga/ifx_i2c/ifx_i2c.h"
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#include "nrf_twi_mngr.h"
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#include "pal_pin_config.h"
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#include <stdbool.h>
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/// @cond hidden
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/**********************************************************************************************************************
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* MACROS
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||||
*********************************************************************************************************************/
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#define PAL_I2C_MASTER_MAX_BITRATE (400)
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/** @brief I2C driver instance */
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#define TWI_INSTANCE_ID 0
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/** @brief Maximal number of pending I2C transactions */
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#define MAX_PENDING_TRANSACTIONS 5
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/*********************************************************************************************************************
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* LOCAL DATA
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*********************************************************************************************************************/
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/* Pointer to the current pal i2c context */
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static pal_i2c_t * gp_pal_i2c_current_ctx;
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/** @brief Definition of TWI manager instance */
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#ifndef IFX_2GO_SUPPORT
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NRF_TWI_MNGR_DEF(m_app_twi, MAX_PENDING_TRANSACTIONS, TWI_INSTANCE_ID);
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#else
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nrf_twi_mngr_t m_app_twi;
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#endif
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/** @brief Definition of TWI manager transfer instance */
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static nrf_twi_mngr_transfer_t m_transfer;
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/** @brief Definition of TWI manager transaction instance */
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static nrf_twi_mngr_transaction_t m_transaction;
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static bool initialized = false;
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/**********************************************************************************************************************
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||||
* LOCAL ROUTINES
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||||
*********************************************************************************************************************/
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||||
|
||||
/**
|
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* Pal I2C event handler function to invoke the registered upper layer callback<br>
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*
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*<b>API Details:</b>
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||||
* - This function implements the platform specific i2c event handling mechanism<br>
|
||||
* - It calls the registered upper layer function after completion of the I2C read/write operations<br>
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||||
* - The respective event status are explained below.
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* - #PAL_I2C_EVENT_ERROR when I2C fails due to low level failures(NACK/I2C protocol errors)
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* - #PAL_I2C_EVENT_SUCCESS when operation is successfully completed
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*
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||||
* \param[in] p_pal_i2c_ctx Pointer to the pal i2c context #pal_i2c_t
|
||||
* \param[in] event Status of the event reported after read/write completion or due to I2C errors
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||||
*
|
||||
*/
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static void app_twi_callback(ret_code_t result, void * p_user_data)
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||||
{
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app_event_handler_t upper_layer_handler;
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//lint --e{611} suppress "void* function pointer is type casted to app_event_handler_t type"
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||||
upper_layer_handler = (app_event_handler_t)gp_pal_i2c_current_ctx->upper_layer_event_handler;
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||||
|
||||
if (result == NRF_SUCCESS)
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||||
{
|
||||
upper_layer_handler(gp_pal_i2c_current_ctx->upper_layer_ctx, PAL_I2C_EVENT_SUCCESS);
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||||
}
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else
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{
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||||
upper_layer_handler(gp_pal_i2c_current_ctx->upper_layer_ctx, PAL_I2C_EVENT_ERROR);
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}
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||||
}
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||||
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||||
/// @endcond
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||||
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||||
/**********************************************************************************************************************
|
||||
* API IMPLEMENTATION
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/**
|
||||
* API to initialize the i2c master with the given context.
|
||||
* <br>
|
||||
*
|
||||
*<b>API Details:</b>
|
||||
* - The platform specific initialization of I2C master has to be implemented as part of this API, if required.<br>
|
||||
* - If the target platform does not demand explicit initialization of i2c master
|
||||
* (Example: If the platform driver takes care of init after the reset), it would not be required to implement.<br>
|
||||
* - The implementation must take care the following scenarios depending upon the target platform selected.
|
||||
* - The implementation must handle the acquiring and releasing of the I2C bus before initializing the I2C master to
|
||||
* avoid interrupting the ongoing slave I2C transactions using the same I2C master.
|
||||
* - If the I2C bus is in busy state, the API must not initialize and return #PAL_STATUS_I2C_BUSY status.
|
||||
* - Repeated initialization must be taken care with respect to the platform requirements. (Example: Multiple users/applications
|
||||
* sharing the same I2C master resource)
|
||||
*
|
||||
*<b>User Input:</b><br>
|
||||
* - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
|
||||
*
|
||||
* \param[in] p_i2c_context Pal i2c context to be initialized
|
||||
*
|
||||
* \retval #PAL_STATUS_SUCCESS Returns when the I2C master init it successfull
|
||||
* \retval #PAL_STATUS_FAILURE Returns when the I2C init fails.
|
||||
*/
|
||||
pal_status_t pal_i2c_init(const pal_i2c_t* p_i2c_context)
|
||||
{
|
||||
#ifndef IFX_2GO_SUPPORT
|
||||
nrf_drv_twi_config_t const config = {
|
||||
.scl = OPTIGA_PIN_I2C_SCL,
|
||||
.sda = OPTIGA_PIN_I2C_SDA,
|
||||
.frequency = NRF_DRV_TWI_FREQ_400K,
|
||||
.interrupt_priority = APP_IRQ_PRIORITY_LOWEST,
|
||||
.clear_bus_init = false
|
||||
};
|
||||
#else
|
||||
#include "ifx_2go_common.h"
|
||||
nrf_drv_twi_config_t const config = {
|
||||
.scl = ifx_2go_pin_config()->scl,
|
||||
.sda = ifx_2go_pin_config()->sda,
|
||||
.frequency = NRF_TWI_FREQ_400K,
|
||||
.interrupt_priority = APP_IRQ_PRIORITY_LOWEST,
|
||||
.clear_bus_init = false
|
||||
};
|
||||
#endif
|
||||
|
||||
if(initialized)
|
||||
{
|
||||
nrf_twi_mngr_uninit(&m_app_twi);
|
||||
}
|
||||
|
||||
// Initialize I2C driver
|
||||
if (nrf_twi_mngr_init(&m_app_twi, &config) != NRF_SUCCESS)
|
||||
{
|
||||
return PAL_STATUS_FAILURE;
|
||||
}
|
||||
|
||||
initialized = true;
|
||||
return PAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* API to de-initialize the I2C master with the specified context.
|
||||
* <br>
|
||||
*
|
||||
*<b>API Details:</b>
|
||||
* - The platform specific de-initialization of I2C master has to be implemented as part of this API, if required.<br>
|
||||
* - If the target platform does not demand explicit de-initialization of i2c master
|
||||
* (Example: If the platform driver takes care of init after the reset), it would not be required to implement.<br>
|
||||
* - The implementation must take care the following scenarios depending upon the target platform selected.
|
||||
* - The implementation must handle the acquiring and releasing of the I2C bus before de-initializing the I2C master to
|
||||
* avoid interrupting the ongoing slave I2C transactions using the same I2C master.
|
||||
* - If the I2C bus is in busy state, the API must not de-initialize and return #PAL_STATUS_I2C_BUSY status.
|
||||
* - This API must ensure that multiple users/applications sharing the same I2C master resource is not impacted.
|
||||
*
|
||||
*<b>User Input:</b><br>
|
||||
* - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
|
||||
*
|
||||
* \param[in] p_i2c_context I2C context to be de-initialized
|
||||
*
|
||||
* \retval #PAL_STATUS_SUCCESS Returns when the I2C master de-init it successfull
|
||||
* \retval #PAL_STATUS_FAILURE Returns when the I2C de-init fails.
|
||||
*/
|
||||
pal_status_t pal_i2c_deinit(const pal_i2c_t* p_i2c_context)
|
||||
{
|
||||
if(initialized) {
|
||||
nrf_twi_mngr_uninit(&m_app_twi);
|
||||
}
|
||||
initialized = false;
|
||||
return PAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* Platform abstraction layer API to write the data to I2C slave.
|
||||
* <br>
|
||||
* <br>
|
||||
* \image html pal_i2c_write.png "pal_i2c_write()" width=20cm
|
||||
*
|
||||
*
|
||||
*<b>API Details:</b>
|
||||
* - The API attempts to write if the I2C bus is free, else it returns busy status #PAL_STATUS_I2C_BUSY<br>
|
||||
* - The bus is released only after the completion of transmission or after completion of error handling.<br>
|
||||
* - The API invokes the upper layer handler with the respective event status as explained below.
|
||||
* - #PAL_I2C_EVENT_BUSY when I2C bus in busy state
|
||||
* - #PAL_I2C_EVENT_ERROR when API fails
|
||||
* - #PAL_I2C_EVENT_SUCCESS when operation is successfully completed asynchronously
|
||||
*<br>
|
||||
*
|
||||
*<b>User Input:</b><br>
|
||||
* - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
|
||||
* - The upper_layer_event_handler must be initialized in the p_i2c_context before invoking the API.<br>
|
||||
*
|
||||
*<b>Notes:</b><br>
|
||||
* - Otherwise the below implementation has to be updated to handle different bitrates based on the input context.<br>
|
||||
* - The caller of this API must take care of the guard time based on the slave's requirement.<br>
|
||||
*
|
||||
* \param[in] p_i2c_context Pointer to the pal I2C context #pal_i2c_t
|
||||
* \param[in] p_data Pointer to the data to be written
|
||||
* \param[in] length Length of the data to be written
|
||||
*
|
||||
* \retval #PAL_STATUS_SUCCESS Returns when the I2C write is invoked successfully
|
||||
* \retval #PAL_STATUS_FAILURE Returns when the I2C write fails.
|
||||
* \retval #PAL_STATUS_I2C_BUSY Returns when the I2C bus is busy.
|
||||
*/
|
||||
pal_status_t pal_i2c_write(pal_i2c_t* p_i2c_context,uint8_t* p_data , uint16_t length)
|
||||
{
|
||||
gp_pal_i2c_current_ctx = p_i2c_context;
|
||||
|
||||
m_transfer.p_data = p_data;
|
||||
m_transfer.length = length;
|
||||
m_transfer.operation = NRF_TWI_MNGR_WRITE_OP(IFX_I2C_BASE_ADDR);
|
||||
m_transfer.flags = 0;
|
||||
|
||||
m_transaction.callback = app_twi_callback;
|
||||
m_transaction.number_of_transfers = 1;
|
||||
m_transaction.p_required_twi_cfg = NULL;
|
||||
m_transaction.p_transfers = &m_transfer;
|
||||
m_transaction.p_user_data = (void*) PAL_STATUS_SUCCESS;
|
||||
|
||||
if (nrf_twi_mngr_schedule(&m_app_twi, &m_transaction) != NRF_SUCCESS)
|
||||
{
|
||||
app_twi_callback(NRF_ERROR_BUSY, 0);
|
||||
}
|
||||
|
||||
return PAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* Platform abstraction layer API to read the data from I2C slave.
|
||||
* <br>
|
||||
* <br>
|
||||
* \image html pal_i2c_read.png "pal_i2c_read()" width=20cm
|
||||
*
|
||||
*<b>API Details:</b>
|
||||
* - The API attempts to read if the I2C bus is free, else it returns busy status #PAL_STATUS_I2C_BUSY<br>
|
||||
* - The bus is released only after the completion of reception or after completion of error handling.<br>
|
||||
* - The API invokes the upper layer handler with the respective event status as explained below.
|
||||
* - #PAL_I2C_EVENT_BUSY when I2C bus in busy state
|
||||
* - #PAL_I2C_EVENT_ERROR when API fails
|
||||
* - #PAL_I2C_EVENT_SUCCESS when operation is successfully completed asynchronously
|
||||
*<br>
|
||||
*
|
||||
*<b>User Input:</b><br>
|
||||
* - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
|
||||
* - The upper_layer_event_handler must be initialized in the p_i2c_context before invoking the API.<br>
|
||||
*
|
||||
*<b>Notes:</b><br>
|
||||
* - Otherwise the below implementation has to be updated to handle different bitrates based on the input context.<br>
|
||||
* - The caller of this API must take care of the guard time based on the slave's requirement.<br>
|
||||
*
|
||||
* \param[in] p_i2c_context pointer to the PAL i2c context #pal_i2c_t
|
||||
* \param[in] p_data Pointer to the data buffer to store the read data
|
||||
* \param[in] length Length of the data to be read
|
||||
*
|
||||
* \retval #PAL_STATUS_SUCCESS Returns when the I2C read is invoked successfully
|
||||
* \retval #PAL_STATUS_FAILURE Returns when the I2C read fails.
|
||||
* \retval #PAL_STATUS_I2C_BUSY Returns when the I2C bus is busy.
|
||||
*/
|
||||
pal_status_t pal_i2c_read(pal_i2c_t* p_i2c_context , uint8_t* p_data , uint16_t length)
|
||||
{
|
||||
gp_pal_i2c_current_ctx = p_i2c_context;
|
||||
|
||||
m_transfer.p_data = p_data;
|
||||
m_transfer.length = length;
|
||||
m_transfer.operation = NRF_TWI_MNGR_READ_OP(IFX_I2C_BASE_ADDR);
|
||||
m_transfer.flags = 0;
|
||||
|
||||
m_transaction.callback = app_twi_callback;
|
||||
m_transaction.number_of_transfers = 1;
|
||||
m_transaction.p_required_twi_cfg = 0;
|
||||
m_transaction.p_transfers = &m_transfer;
|
||||
m_transaction.p_user_data = (void*) PAL_STATUS_SUCCESS;
|
||||
|
||||
if (nrf_twi_mngr_schedule(&m_app_twi, &m_transaction) != NRF_SUCCESS)
|
||||
{
|
||||
app_twi_callback(NRF_ERROR_BUSY, 0);
|
||||
}
|
||||
|
||||
return PAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* Platform abstraction layer API to set the bitrate/speed(KHz) of I2C master.
|
||||
* <br>
|
||||
*
|
||||
*<b>API Details:</b>
|
||||
* - Sets the bitrate of I2C master if the I2C bus is free, else it returns busy status #PAL_STATUS_I2C_BUSY<br>
|
||||
* - The bus is released after the setting the bitrate.<br>
|
||||
* - This API must take care of setting the bitrate to I2C master's maximum supported value.
|
||||
* - Eg. In XMC4500, the maximum supported bitrate is 400 KHz. If the supplied bitrate is greater than 400KHz, the API will
|
||||
* set the I2C master's bitrate to 400KHz.
|
||||
* - Use the #PAL_I2C_MASTER_MAX_BITRATE macro to specify the maximum supported bitrate value for the target platform.
|
||||
* - If upper_layer_event_handler is initialized, the upper layer handler is invoked with the respective event
|
||||
* status listed below.
|
||||
* - #PAL_I2C_EVENT_BUSY when I2C bus in busy state
|
||||
* - #PAL_I2C_EVENT_ERROR when API fails to set the bit rate
|
||||
* - #PAL_I2C_EVENT_SUCCESS when operation is successful
|
||||
*<br>
|
||||
*
|
||||
*<b>User Input:</b><br>
|
||||
* - The input #pal_i2c_t p_i2c_context must not be NULL.<br>
|
||||
*
|
||||
* \param[in] p_i2c_context Pointer to the pal i2c context
|
||||
* \param[in] bitrate Bitrate to be used by i2c master in KHz
|
||||
*
|
||||
* \retval #PAL_STATUS_SUCCESS Returns when the setting of bitrate is successfully completed
|
||||
* \retval #PAL_STATUS_FAILURE Returns when the setting of bitrate fails.
|
||||
* \retval #PAL_STATUS_I2C_BUSY Returns when the I2C bus is busy.
|
||||
*/
|
||||
pal_status_t pal_i2c_set_bitrate(const pal_i2c_t* p_i2c_context , uint16_t bitrate)
|
||||
{
|
||||
// Bitrate is fixed to the maximum frequency on this platform (400K)
|
||||
return PAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
#ifdef IFX_2GO_SUPPORT
|
||||
pal_status_t pal_i2c_set_instance(nrf_twi_mngr_t* twi_inst)
|
||||
{
|
||||
m_app_twi = *twi_inst;
|
||||
}
|
||||
#endif/*IFX_2GO_SUPPORT*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
89
external/infineon/pal/nrf5x/pal_ifx_i2c_config.c
vendored
Normal file
89
external/infineon/pal/nrf5x/pal_ifx_i2c_config.c
vendored
Normal file
@@ -0,0 +1,89 @@
|
||||
/**
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Infineon Technologies AG
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE
|
||||
*
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief This file implements platform abstraction layer configurations for ifx i2c protocol.
|
||||
*
|
||||
* \addtogroup grPAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* HEADER FILES
|
||||
*********************************************************************************************************************/
|
||||
#include "stdlib.h"
|
||||
#include "stdio.h"
|
||||
#include "optiga/pal/pal_gpio.h"
|
||||
#include "optiga/pal/pal_i2c.h"
|
||||
#include "optiga/ifx_i2c/ifx_i2c_config.h"
|
||||
#include "pal_pin_config.h"
|
||||
|
||||
/*********************************************************************************************************************
|
||||
* pal ifx i2c instance
|
||||
*********************************************************************************************************************/
|
||||
/**
|
||||
* \brief PAL I2C configuration for OPTIGA.
|
||||
*/
|
||||
pal_i2c_t optiga_pal_i2c_context_0 =
|
||||
{
|
||||
/// Pointer to I2C master platform specific context
|
||||
NULL,
|
||||
/// Slave address
|
||||
IFX_I2C_BASE_ADDR,
|
||||
/// Upper layer context
|
||||
NULL,
|
||||
/// Callback event handler
|
||||
NULL
|
||||
};
|
||||
|
||||
/*********************************************************************************************************************
|
||||
* PAL GPIO configurations defined for nrf52 development boards PCA10040 and PCA10056 with the Trust X Shield and
|
||||
* Trust M 2Go board plugged in.
|
||||
*********************************************************************************************************************/
|
||||
/**
|
||||
* \brief PAL vdd pin configuration for OPTIGA.
|
||||
*/
|
||||
pal_gpio_t optiga_vdd_0 =
|
||||
{
|
||||
// Platform specific GPIO context for the pin used to toggle Vdd.
|
||||
// Casting the uint32_t to a void* is possible, because nrf52 is a 32Bit platform
|
||||
(void*) OPTIGA_PIN_VDD
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief PAL reset pin configuration for OPTIGA.
|
||||
*/
|
||||
pal_gpio_t optiga_reset_0 =
|
||||
{
|
||||
// Platform specific GPIO context for the pin used to toggle Reset.
|
||||
// Casting the uint32_t to a void* is possible, because nrf52 is a 32Bit platform
|
||||
(void*) OPTIGA_PIN_RST
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
211
external/infineon/pal/nrf5x/pal_os.c
vendored
Normal file
211
external/infineon/pal/nrf5x/pal_os.c
vendored
Normal file
@@ -0,0 +1,211 @@
|
||||
/**
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Infineon Technologies AG
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE
|
||||
*
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief This file implements the platform abstraction layer APIs for os event/scheduler.
|
||||
*
|
||||
* \addtogroup grPAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* HEADER FILES
|
||||
*********************************************************************************************************************/
|
||||
#include <stdbool.h>
|
||||
#include "stdlib.h"
|
||||
#include "stdio.h"
|
||||
#include "optiga/pal/pal_os_event.h"
|
||||
#include "nrf_rtc.h"
|
||||
#include "nrf_drv_rtc.h"
|
||||
#include "nrf_delay.h"
|
||||
#include "nrf_pwr_mgmt.h"
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* MACROS
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/*********************************************************************************************************************
|
||||
* LOCAL DATA
|
||||
*********************************************************************************************************************/
|
||||
/// @cond hidden
|
||||
/// Callback function when timer elapses
|
||||
static volatile register_callback callback_registered = NULL;
|
||||
/// Pointer to store upper layer callback context (For example: Ifx i2c context)
|
||||
static void * callback_ctx;
|
||||
/// Flag to indicate to the delay function when the timer has elapsed
|
||||
static volatile bool timer_elapsed = false;
|
||||
|
||||
/// Flag to indicate if the the RTC was already initialized, re-init. causes an NRF_ERROR
|
||||
static bool m_rtc2_is_initialized = false;
|
||||
static const nrf_drv_rtc_t rtc2 = NRF_DRV_RTC_INSTANCE(2);
|
||||
static nrf_drv_rtc_config_t m_rtc2_config = NRF_DRV_RTC_DEFAULT_CONFIG;
|
||||
#define RTC_CLOCK_FREQUENCY 32768
|
||||
// Set the prescaler to approximately get 0.25 ms intervals
|
||||
// 32768Hz/8 = 4096 Hz -> 0.2441us
|
||||
// it's a 24bit counter, so it will overflow every ~68min
|
||||
#define RTC_PRESCALER 8
|
||||
#define RTC_TICK_FREQ (RTC_CLOCK_FREQUENCY/RTC_PRESCALER)
|
||||
|
||||
/**
|
||||
* Timer callback handler.
|
||||
*
|
||||
* This get called from the TIMER elapse event.<br>
|
||||
* Once the timer expires, the registered callback funtion gets called from the timer event handler, if
|
||||
* the call back is not NULL.<br>
|
||||
*
|
||||
*\param[in] args Callback argument
|
||||
*
|
||||
*/
|
||||
static void ifx_rtc_handler(nrf_drv_rtc_int_type_t int_type)
|
||||
{
|
||||
volatile register_callback callback;
|
||||
(void)nrf_drv_rtc_cc_disable(&rtc2, int_type);
|
||||
switch(int_type)
|
||||
{
|
||||
case NRF_DRV_RTC_INT_COMPARE0:
|
||||
// handler for register_callback_oneshot
|
||||
if (callback_registered != NULL)
|
||||
{
|
||||
callback = callback_registered;
|
||||
callback_registered = NULL;
|
||||
callback(callback_ctx);
|
||||
}
|
||||
|
||||
break;
|
||||
case NRF_DRV_RTC_INT_COMPARE1:
|
||||
// handler for delay_in_milliseconds
|
||||
timer_elapsed = true;
|
||||
break;
|
||||
default:
|
||||
// Do nothing
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/// @endcond
|
||||
|
||||
void pal_os_event_init()
|
||||
{
|
||||
if (m_rtc2_is_initialized == true)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
// set prescaler so that a tick is approximately 1ms
|
||||
m_rtc2_config.prescaler = RTC_PRESCALER;
|
||||
|
||||
// Initialize the RTC2 driver instance
|
||||
APP_ERROR_CHECK(nrf_drv_rtc_init(&rtc2, &m_rtc2_config, ifx_rtc_handler));
|
||||
|
||||
// Power on RTC instance
|
||||
nrf_drv_rtc_enable(&rtc2);
|
||||
|
||||
m_rtc2_is_initialized = true;
|
||||
}
|
||||
|
||||
/**
|
||||
* Platform specific event call back registration function to trigger once when timer expires.
|
||||
* <br>
|
||||
*
|
||||
* <b>API Details:</b>
|
||||
* This function registers the callback function supplied by the caller.<br>
|
||||
* It triggers a timer with the supplied time interval in microseconds.<br>
|
||||
* Once the timer expires, the registered callback function gets called.<br>
|
||||
*
|
||||
* \param[in] callback Callback function pointer
|
||||
* \param[in] callback_args Callback arguments
|
||||
* \param[in] time_us time in micro seconds to trigger the call back
|
||||
*
|
||||
*/
|
||||
void pal_os_event_register_callback_oneshot(register_callback callback,
|
||||
void* callback_args,
|
||||
uint32_t time_us)
|
||||
{
|
||||
callback_registered = callback;
|
||||
callback_ctx = callback_args;
|
||||
|
||||
// parentheses are set this way to avoid overflow when multiplying time_us with something
|
||||
uint32_t future_ticks = (time_us/(1000*1000/RTC_TICK_FREQ));
|
||||
|
||||
// we can't reliably set an interrupt less than two ticks ahead, as per NRF52832 datasheet, p. 245
|
||||
// do busy waiting instead
|
||||
if(future_ticks < 2) {
|
||||
nrf_delay_us(time_us);
|
||||
ifx_rtc_handler(NRF_DRV_RTC_INT_COMPARE0);
|
||||
return;
|
||||
}
|
||||
|
||||
// add current tick value
|
||||
future_ticks += nrf_drv_rtc_counter_get(&rtc2);
|
||||
|
||||
// Set the compare register to trigger approximately at time_us
|
||||
APP_ERROR_CHECK(nrf_drv_rtc_cc_set(&rtc2, NRF_DRV_RTC_INT_COMPARE0, future_ticks, true));
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the current time in milliseconds<br>
|
||||
*
|
||||
*
|
||||
* \retval uint32_t time in milliseconds
|
||||
*/
|
||||
uint32_t pal_os_timer_get_time_in_milliseconds(void)
|
||||
{
|
||||
return nrf_drv_rtc_counter_get(&rtc2)*1000/RTC_TICK_FREQ;
|
||||
}
|
||||
|
||||
/**
|
||||
* Function to wait or delay until the given milliseconds time
|
||||
*
|
||||
* \param[in] milliseconds Delay value in milliseconds
|
||||
*
|
||||
*/
|
||||
void pal_os_timer_delay_in_milliseconds(uint16_t milliseconds)
|
||||
{
|
||||
timer_elapsed = false;
|
||||
uint32_t future_ticks = milliseconds*(RTC_TICK_FREQ/1000);
|
||||
|
||||
// we can't reliably set an interrupt less than two ticks ahead, as per NRF52832 datasheet, p. 245
|
||||
// do busy waiting instead
|
||||
if(future_ticks < 2) {
|
||||
nrf_delay_ms(milliseconds);
|
||||
return;
|
||||
}
|
||||
|
||||
// add current tick value
|
||||
future_ticks += nrf_drv_rtc_counter_get(&rtc2);
|
||||
|
||||
// Set the compare register to trigger in approximately milliseconds
|
||||
APP_ERROR_CHECK(nrf_drv_rtc_cc_set(&rtc2, NRF_DRV_RTC_INT_COMPARE1, future_ticks, true));
|
||||
while(!timer_elapsed)
|
||||
{
|
||||
nrf_pwr_mgmt_run();
|
||||
}
|
||||
timer_elapsed = false;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
64
external/infineon/pal/nrf5x/pal_os_lock.c
vendored
Normal file
64
external/infineon/pal/nrf5x/pal_os_lock.c
vendored
Normal file
@@ -0,0 +1,64 @@
|
||||
/**
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Infineon Technologies AG
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE
|
||||
*
|
||||
*
|
||||
* \file pal_os_lock.c
|
||||
*
|
||||
* \brief This file implements the platform abstraction layer APIs for os locks (e.g. semaphore).
|
||||
*
|
||||
* \addtogroup grPAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "optiga/pal/pal_os_lock.h"
|
||||
#include "nrf_atomic.h"
|
||||
#include "nrf_pwr_mgmt.h"
|
||||
|
||||
/**
|
||||
* @brief PAL OS lock structure. Might be extended if needed
|
||||
*/
|
||||
typedef struct pal_os_lock
|
||||
{
|
||||
nrf_atomic_flag_t lock;
|
||||
} pal_os_lock_t;
|
||||
|
||||
static volatile pal_os_lock_t pal_os_lock = {.lock = 0};
|
||||
|
||||
pal_status_t pal_os_lock_acquire(void)
|
||||
{
|
||||
// wait until previous value was false, this indicates the lock was free and we own it now.
|
||||
while(nrf_atomic_flag_set_fetch(&pal_os_lock.lock)) {
|
||||
nrf_pwr_mgmt_run();
|
||||
}
|
||||
|
||||
return PAL_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
void pal_os_lock_release(void)
|
||||
{
|
||||
(void)nrf_atomic_flag_clear(&pal_os_lock.lock);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
112
external/infineon/pal/nrf5x/pal_pin_config.h
vendored
Normal file
112
external/infineon/pal/nrf5x/pal_pin_config.h
vendored
Normal file
@@ -0,0 +1,112 @@
|
||||
/**
|
||||
* \copyright
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2019 Infineon Technologies AG
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE
|
||||
*
|
||||
* \endcopyright
|
||||
*
|
||||
* \author Infineon Technologies AG
|
||||
*
|
||||
* \file pal_pin_config.h
|
||||
*
|
||||
* \brief This file defines the pins the OPTIGA is connected to.
|
||||
*
|
||||
* \addtogroup grPAL
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _OPTIGA_PIN_CONFIG_H_
|
||||
#define _OPTIGA_PIN_CONFIG_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "boards.h"
|
||||
#include <stdint.h>
|
||||
|
||||
// To select a pin configuration set its define to '1' and all others to '0'
|
||||
|
||||
// Trust X Shield
|
||||
// OPTIGA as 2Go board on the TrustX shield, e.g. TrustX2Go and TrustM2Go
|
||||
#define OPTIGA_PIN_CONFIG_2GO 0
|
||||
// OPTIGA soldered on the TrustX shield
|
||||
#define OPTIGA_PIN_CONFIG_TRUSTX_SHIELD 0
|
||||
|
||||
// MY IOT ADAPTER
|
||||
// Product Link: https://www.infineon.com/cms/en/product/evaluation-boards/my-iot-adapter/
|
||||
// OPTIGA as 2Go board on MY IOT ADAPTER Slot 1
|
||||
#define OPTIGA_PIN_CONFIG_MYIOT_SLOT1 0
|
||||
// OPTIGA as 2Go board on MY IOT ADAPTER Slot 2 or 3
|
||||
#define OPTIGA_PIN_CONFIG_MYIOT_SLOT2_3 1
|
||||
|
||||
/*
|
||||
* The following defines pack additional information into the highest bits of
|
||||
* a void*. This is safe, because on nrf52 the pin description uses less than 8 bit
|
||||
* and a void* has 32 bits on this platform.
|
||||
*/
|
||||
|
||||
/** @brief set a pin to this value to mark it as unused and it will not be initialised */
|
||||
#define OPTIGA_PIN_UNUSED UINT32_C(0xFFFFFFFF)
|
||||
|
||||
#define OPTIGA_PIN_INITIAL_VAL_MASK (UINT32_C(1) << 31)
|
||||
/** @brief defines the initial state of the pin */
|
||||
#define OPTIGA_PIN_INITIAL_VAL_HIGH OPTIGA_PIN_INITIAL_VAL_MASK
|
||||
#define OPTIGA_PIN_INITIAL_VAL_LOW 0
|
||||
|
||||
#define OPTIGA_PIN_ONE_TIME_INIT_MASK (UINT32_C(1) << 30)
|
||||
/** @brief If this flag is set, the pin will be initialised with the specified value, but not used */
|
||||
#define OPTIGA_PIN_ONE_TIME_INIT OPTIGA_PIN_ONE_TIME_INIT_MASK
|
||||
|
||||
#define OPTIGA_PIN_ALL_MASKS (OPTIGA_PIN_INITIAL_VAL_MASK | OPTIGA_PIN_ONE_TIME_INIT_MASK)
|
||||
|
||||
#if OPTIGA_PIN_CONFIG_2GO == 1
|
||||
#define OPTIGA_PIN_VDD (ARDUINO_9_PIN | OPTIGA_PIN_INITIAL_VAL_LOW | OPTIGA_PIN_ONE_TIME_INIT)
|
||||
#define OPTIGA_PIN_RST (ARDUINO_7_PIN | OPTIGA_PIN_INITIAL_VAL_LOW)
|
||||
#elif OPTIGA_PIN_CONFIG_TRUSTX_SHIELD == 1
|
||||
#define OPTIGA_PIN_VDD (ARDUINO_9_PIN | OPTIGA_PIN_INITIAL_VAL_HIGH)
|
||||
#define OPTIGA_PIN_RST (ARDUINO_7_PIN | OPTIGA_PIN_INITIAL_VAL_LOW)
|
||||
#elif OPTIGA_PIN_CONFIG_MYIOT_SLOT1 == 1
|
||||
#define OPTIGA_PIN_RST (ARDUINO_10_PIN | OPTIGA_PIN_INITIAL_VAL_LOW)
|
||||
#define OPTIGA_PIN_VDD OPTIGA_PIN_UNUSED
|
||||
#elif OPTIGA_PIN_CONFIG_MYIOT_SLOT2_3 == 1
|
||||
#define OPTIGA_PIN_RST (ARDUINO_5_PIN | OPTIGA_PIN_INITIAL_VAL_LOW)
|
||||
#define OPTIGA_PIN_VDD OPTIGA_PIN_UNUSED
|
||||
#else
|
||||
#error "No pin configuration selected"
|
||||
#endif
|
||||
|
||||
/** @brief PIN for I2C SCL to Infineon OPTIGA Trust X device */
|
||||
#define OPTIGA_PIN_I2C_SCL (ARDUINO_SCL_PIN)
|
||||
/** @brief PIN for I2C SDA to Infineon OPTIGA Trust X device */
|
||||
#define OPTIGA_PIN_I2C_SDA (ARDUINO_SDA_PIN)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*_OPTIGA_PIN_CONFIG_H_*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
Reference in New Issue
Block a user