初始版本
This commit is contained in:
xiaozhengsheng
@@ -0,0 +1,52 @@
|
||||
/**
|
||||
* Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef SER_CONFIG_5W_APP_H__
|
||||
#define SER_CONFIG_5W_APP_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // SER_CONFIG_5W_APP_H__
|
||||
@@ -0,0 +1,106 @@
|
||||
/**
|
||||
* Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef SER_PHY_CONFIG_APP_H__
|
||||
#define SER_PHY_CONFIG_APP_H__
|
||||
|
||||
#include "boards.h"
|
||||
#include "ser_config.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(SPI_MASTER_0_ENABLE)
|
||||
#define SER_PHY_SPI_MASTER SPI_MASTER_0
|
||||
#endif
|
||||
#if defined(SPI_MASTER_1_ENABLE)
|
||||
#define SER_PHY_SPI_MASTER SPI_MASTER_1
|
||||
#endif
|
||||
#if defined(SPI_MASTER_2_ENABLE)
|
||||
#define SER_PHY_SPI_MASTER SPI_MASTER_2
|
||||
#endif
|
||||
|
||||
#if (defined(SPI0_ENABLED) && (SPI0_ENABLED == 1)) || defined(SPI_MASTER_0_ENABLE)
|
||||
|
||||
#define SER_PHY_SPI_MASTER_INSTANCE NRF_DRV_SPI_INSTANCE(0)
|
||||
#define SER_PHY_SPI_MASTER_PIN_SCK SER_APP_SPIM0_SCK_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_MISO SER_APP_SPIM0_MISO_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_MOSI SER_APP_SPIM0_MOSI_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_SELECT SER_APP_SPIM0_SS_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_REQUEST SER_APP_SPIM0_REQ_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_READY SER_APP_SPIM0_RDY_PIN
|
||||
|
||||
#elif (defined(SPI1_ENABLED) && (SPI1_ENABLED == 1)) || defined(SPI_MASTER_1_ENABLE)
|
||||
|
||||
#define SER_PHY_SPI_MASTER_INSTANCE NRF_DRV_SPI_INSTANCE(1)
|
||||
#define SER_PHY_SPI_MASTER_PIN_SCK SER_APP_SPIM1_SCK_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_MISO SER_APP_SPIM1_MISO_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_MOSI SER_APP_SPIM1_MOSI_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_SELECT SER_APP_SPIM1_SS_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_REQUEST SER_APP_SPIM1_REQ_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_READY SER_APP_SPIM1_RDY_PIN
|
||||
|
||||
#elif (defined(SPI2_ENABLED) && (SPI2_ENABLED == 1)) || defined(SPI_MASTER_2_ENABLE)
|
||||
|
||||
#define SER_PHY_SPI_MASTER_INSTANCE NRF_DRV_SPI_INSTANCE(2)
|
||||
#define SER_PHY_SPI_MASTER_PIN_SCK SER_APP_SPIM2_SCK_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_MISO SER_APP_SPIM2_MISO_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_MOSI SER_APP_SPIM2_MOSI_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_SELECT SER_APP_SPIM2_SS_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_REQUEST SER_APP_SPIM2_REQ_PIN
|
||||
#define SER_PHY_SPI_MASTER_PIN_SLAVE_READY SER_APP_SPIM2_RDY_PIN
|
||||
|
||||
#endif
|
||||
|
||||
#define CONN_CHIP_RESET_PIN_NO SER_CONN_CHIP_RESET_PIN /**< Pin used for reseting the connectivity. */
|
||||
|
||||
/* UART configuration */
|
||||
#define UART_IRQ_PRIORITY APP_IRQ_PRIORITY_MID
|
||||
#define SER_PHY_UART_RX SER_APP_RX_PIN
|
||||
#define SER_PHY_UART_TX SER_APP_TX_PIN
|
||||
#define SER_PHY_UART_CTS SER_APP_CTS_PIN
|
||||
#define SER_PHY_UART_RTS SER_APP_RTS_PIN
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // SER_PHY_CONFIG_APP_H__
|
||||
@@ -0,0 +1,82 @@
|
||||
/**
|
||||
* Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef SER_PHY_CONFIG_CONN_H__
|
||||
#define SER_PHY_CONFIG_CONN_H__
|
||||
|
||||
#include "boards.h"
|
||||
#include "ser_config.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************//**
|
||||
* SER_PHY layer configuration.
|
||||
**************************************************************************************************/
|
||||
#define SER_PHY_SPI_PPI_RDY_CH 0
|
||||
#define SER_PHY_SPI_GPIOTE_RDY_CH 0
|
||||
|
||||
#ifdef NRF_SPIS0
|
||||
#define SER_PHY_SPI_SLAVE_INSTANCE 0
|
||||
#else
|
||||
#define SER_PHY_SPI_SLAVE_INSTANCE 1
|
||||
#endif
|
||||
|
||||
#define SER_PHY_SPI_SLAVE_REQ_PIN SER_CON_SPIS_REQ_PIN
|
||||
#define SER_PHY_SPI_SLAVE_RDY_PIN SER_CON_SPIS_RDY_PIN
|
||||
#define SER_PHY_SPI_SLAVE_SCK_PIN SER_CON_SPIS_SCK_PIN
|
||||
#define SER_PHY_SPI_SLAVE_MISO_PIN SER_CON_SPIS_MISO_PIN
|
||||
#define SER_PHY_SPI_SLAVE_MOSI_PIN SER_CON_SPIS_MOSI_PIN
|
||||
#define SER_PHY_SPI_SLAVE_SS_PIN SER_CON_SPIS_CSN_PIN
|
||||
|
||||
/* UART configuration */
|
||||
#define UART_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
|
||||
|
||||
#define SER_PHY_UART_RX SER_CON_RX_PIN
|
||||
#define SER_PHY_UART_TX SER_CON_TX_PIN
|
||||
#define SER_PHY_UART_CTS SER_CON_CTS_PIN
|
||||
#define SER_PHY_UART_RTS SER_CON_RTS_PIN
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // SER_PHY_CONFIG_CONN_H__
|
||||
@@ -0,0 +1,198 @@
|
||||
/**
|
||||
* Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef SER_PHY_DEBUG_APP_H__
|
||||
#define SER_PHY_DEBUG_APP_H__
|
||||
|
||||
#ifndef SER_PHY_DEBUG_APP_ENABLE
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_REQUEST(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_READY(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_DONE(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_API_CALL(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_READY_EDGE(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_REQUEST_EDGE(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_TX_PKT_SENT(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_RX_PKT_DROPPED(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_RX_PKT_RECEIVED(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_BUF_REQUEST(data)
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_GUARDED(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_PASSED(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_ABORTED(data)
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_RESTARTED(data)
|
||||
|
||||
#else
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//Low level hardware events
|
||||
typedef enum
|
||||
{
|
||||
SPI_MASTER_RAW_READY,
|
||||
SPI_MASTER_RAW_REQUEST,
|
||||
SPI_MASTER_RAW_XFER_DONE,
|
||||
SPI_MASTER_RAW_API_CALL,
|
||||
SPI_MASTER_RAW_READY_EDGE,
|
||||
SPI_MASTER_RAW_REQUEST_EDGE,
|
||||
SPI_MASTER_RAW_XFER_STARTED,
|
||||
SPI_MASTER_RAW_XFER_GUARDED,
|
||||
SPI_MASTER_RAW_XFER_PASSED,
|
||||
SPI_MASTER_RAW_XFER_ABORTED,
|
||||
SPI_MASTER_RAW_XFER_RESTARTED,
|
||||
SPI_MASTER_PHY_TX_PKT_SENT,
|
||||
SPI_MASTER_PHY_BUF_REQUEST,
|
||||
SPI_MASTER_PHY_RX_PKT_RECEIVED,
|
||||
SPI_MASTER_PHY_RX_PKT_DROPPED,
|
||||
SPI_MASTER_EVT_MAX
|
||||
} spi_master_raw_evt_type_t;
|
||||
|
||||
|
||||
//Low level hardware event definition
|
||||
typedef struct
|
||||
{
|
||||
spi_master_raw_evt_type_t evt;
|
||||
uint32_t data;
|
||||
} spi_master_raw_evt_t;
|
||||
|
||||
typedef void (*spi_master_raw_callback_t)(spi_master_raw_evt_t event);
|
||||
|
||||
void debug_init(spi_master_raw_callback_t spi_master_raw_evt_callback);
|
||||
|
||||
void debug_evt(spi_master_raw_evt_type_t evt, uint32_t data);
|
||||
|
||||
|
||||
#define DEBUG_EVT(evt, data) \
|
||||
do { \
|
||||
debug_evt(evt, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_REQUEST(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_REQUEST, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_READY(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_READY, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_DONE(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_XFER_DONE, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_API_CALL(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_API_CALL, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_READY_EDGE(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_READY_EDGE, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_REQUEST_EDGE(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_REQUEST_EDGE, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_TX_PKT_SENT(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_PHY_TX_PKT_SENT, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_RX_PKT_DROPPED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_PHY_RX_PKT_DROPPED, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_RX_PKT_RECEIVED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_PHY_RX_PKT_RECEIVED, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_PHY_BUF_REQUEST(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_PHY_BUF_REQUEST, data); \
|
||||
} while (0);
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_GUARDED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_XFER_GUARDED, data); \
|
||||
} while (0);
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_PASSED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_XFER_PASSED, data); \
|
||||
} while (0);
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_ABORTED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_XFER_ABORTED, data); \
|
||||
} while (0);
|
||||
|
||||
#define DEBUG_EVT_SPI_MASTER_RAW_XFER_RESTARTED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_MASTER_RAW_XFER_RESTARTED, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //SER_PHY_DEBUG_APP_H__
|
||||
@@ -0,0 +1,166 @@
|
||||
/**
|
||||
* Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef SER_PHY_DEBUG_CONN_H__
|
||||
#define SER_PHY_DEBUG_CONN_H__
|
||||
|
||||
#ifndef SER_PHY_DEBUG_CONN_ENABLE
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_RX_XFER_DONE(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_TX_XFER_DONE(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_BUFFERS_SET(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_REQ_SET(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_REQ_CLEARED(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_BUF_REQUEST(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_PKT_RECEIVED(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_PKT_DROPPED(data);
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_PKT_SENT(data);
|
||||
|
||||
#else
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// low level hardware event types
|
||||
typedef enum
|
||||
{
|
||||
SPI_SLAVE_RAW_BUFFERS_SET,
|
||||
SPI_SLAVE_RAW_RX_XFER_DONE,
|
||||
SPI_SLAVE_RAW_TX_XFER_DONE,
|
||||
SPI_SLAVE_RAW_REQ_SET,
|
||||
SPI_SLAVE_RAW_REQ_CLEARED,
|
||||
SPI_SLAVE_PHY_BUF_REQUEST,
|
||||
SPI_SLAVE_PHY_PKT_SENT,
|
||||
SPI_SLAVE_PHY_PKT_RECEIVED,
|
||||
SPI_SLAVE_PHY_PKT_DROPPED,
|
||||
SPI_SLAVE_RAW_EVT_TYPE_MAX
|
||||
} spi_slave_raw_evt_type_t;
|
||||
|
||||
// low level hardware event definition
|
||||
typedef struct
|
||||
{
|
||||
spi_slave_raw_evt_type_t evt_type;
|
||||
uint32_t data;
|
||||
} spi_slave_raw_evt_t;
|
||||
|
||||
typedef void (*spi_slave_raw_callback_t)(spi_slave_raw_evt_t event);
|
||||
|
||||
void debug_init(spi_slave_raw_callback_t spi_slave_raw_evt_callback);
|
||||
|
||||
void debug_evt(spi_slave_raw_evt_type_t evt_type, uint32_t data);
|
||||
|
||||
#define DEBUG_EVT(evt, data) \
|
||||
do { \
|
||||
debug_evt(evt, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_RX_XFER_DONE(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_RAW_RX_XFER_DONE, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_TX_XFER_DONE(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_RAW_TX_XFER_DONE, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_BUFFERS_SET(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_RAW_BUFFERS_SET, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_REQ_SET(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_RAW_REQ_SET, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_RAW_REQ_CLEARED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_RAW_REQ_CLEARED, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_BUF_REQUEST(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_PHY_BUF_REQUEST, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_PKT_RECEIVED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_PHY_PKT_RECEIVED, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_PKT_DROPPED(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_PHY_PKT_DROPPED, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#define DEBUG_EVT_SPI_SLAVE_PHY_PKT_SENT(data) \
|
||||
do { \
|
||||
DEBUG_EVT(SPI_SLAVE_PHY_PKT_SENT, data); \
|
||||
} while (0);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //SER_PHY_DEBUG_CONN_H__
|
||||
Reference in New Issue
Block a user