161 lines
6.5 KiB
C
161 lines
6.5 KiB
C
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/*
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Copyright (c) 2009-2020 ARM Limited. All rights reserved.
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SPDX-License-Identifier: Apache-2.0
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Licensed under the Apache License, Version 2.0 (the License); you may
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not use this file except in compliance with the License.
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You may obtain a copy of the License at
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www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an AS IS BASIS, WITHOUT
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WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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NOTICE: This file has been modified by Nordic Semiconductor ASA.
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*/
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/* NOTE: Template files (including this one) are application specific and therefore expected to
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be copied into the application project folder prior to its use! */
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf.h"
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#include "nrf_erratas.h"
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#include "system_nrf52811.h"
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/*lint ++flb "Enter library region" */
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#define __SYSTEM_CLOCK_64M (64000000UL)
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#if defined ( __CC_ARM )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
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#elif defined ( __ICCARM__ )
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__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
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#elif defined ( __GNUC__ )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
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#endif
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void SystemCoreClockUpdate(void)
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{
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SystemCoreClock = __SYSTEM_CLOCK_64M;
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}
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void SystemInit(void)
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{
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/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_31()){
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*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
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}
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/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_36()){
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NRF_CLOCK->EVENTS_DONE = 0;
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NRF_CLOCK->EVENTS_CTTO = 0;
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NRF_CLOCK->CTIV = 0;
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}
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/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_66()){
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NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
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NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
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NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
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NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
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NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
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NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
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NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
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NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
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NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
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NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
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NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
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NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
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NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
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NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
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NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
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NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
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NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
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}
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#ifdef DEVELOP_IN_NRF52840
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/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_103()){
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NRF_CCM->MAXPACKETSIZE = 0xFBul;
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}
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/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_115()){
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*(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
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}
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#endif
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/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_136()){
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if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
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NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
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}
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}
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/* Workaround for Errata 217 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf52_errata_217()){
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*(volatile uint32_t *)0x40000EE4ul |= 0x0000000Ful;
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}
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/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
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defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
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reserved for PinReset and not available as normal GPIO. */
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#if defined (CONFIG_GPIO_AS_PINRESET)
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#ifdef DEVELOP_IN_NRF52840
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#define RESET_PIN 18
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#else
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#define RESET_PIN 21
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#endif
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if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
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((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->PSELRESET[0] = RESET_PIN;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->PSELRESET[1] = RESET_PIN;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NVIC_SystemReset();
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}
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#endif
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/* When developing on an nrf52840, make sure NFC pins are mapped as GPIO. */
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#if defined (DEVELOP_IN_NRF52840)
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if (((*((uint32_t *)0x10001200) & (1 << 0)) != 0) || ((*((uint32_t *)0x10001204) & (1 << 0)) != 0)){
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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*((uint32_t *)0x10001200) = 0;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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*((uint32_t *)0x10001204) = 0;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NVIC_SystemReset();
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}
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#endif
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SystemCoreClockUpdate();
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}
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/*lint --flb "Leave library region" */
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