90 lines
3.3 KiB
C
90 lines
3.3 KiB
C
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/*
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Copyright (c) 2009-2020 ARM Limited. All rights reserved.
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SPDX-License-Identifier: Apache-2.0
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Licensed under the Apache License, Version 2.0 (the License); you may
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not use this file except in compliance with the License.
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You may obtain a copy of the License at
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www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an AS IS BASIS, WITHOUT
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WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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NOTICE: This file has been modified by Nordic Semiconductor ASA.
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*/
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/* NOTE: Template files (including this one) are application specific and therefore expected to
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be copied into the application project folder prior to its use! */
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf.h"
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#include "nrf_erratas.h"
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#include "system_nrf51.h"
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/*lint ++flb "Enter library region" */
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#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
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#if defined ( __CC_ARM )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
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#elif defined ( __ICCARM__ )
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__root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
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#elif defined ( __GNUC__ )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
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#endif
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void SystemCoreClockUpdate(void)
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{
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SystemCoreClock = __SYSTEM_CLOCK;
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}
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void SystemInit(void)
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{
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/* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
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It can also be done in the application main() function. */
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/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
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to enable the use of peripherals" found at Product Anomaly document for your device found at
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https://infocenter.nordicsemi.com/index.jsp The side effect of executing these instructions in the devices
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that do not need it is that the new peripherals in the second generation devices (LPCOMP for
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example) will not be available. */
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if (nrf51_errata_26())
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{
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*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
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*(uint32_t volatile *)0x40006C18 = 0x00008000;
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}
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/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
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register is incorrect" found at Product Anomaly document for your device found at
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https://infocenter.nordicsemi.com/index.jsp There is no side effect of using these instruction if not needed. */
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if (nrf51_errata_59())
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{
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NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
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}
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/* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
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as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
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for your device found at https://infocenter.nordicsemi.com/index.jsp */
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if (nrf51_errata_76()){
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if (*(uint32_t volatile *)0x4006EC00 != 1){
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*(uint32_t volatile *)0x4006EC00 = 0x9375;
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while (*(uint32_t volatile *)0x4006EC00 != 1){
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}
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}
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*(uint32_t volatile *)0x4006EC14 = 0xC0;
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}
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SystemCoreClockUpdate();
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}
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/*lint --flb "Leave library region" */
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