587 lines
20 KiB
C
587 lines
20 KiB
C
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/**
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* Copyright (c) 2019 - 2020, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef NRFX_GPPI_H
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#define NRFX_GPPI_H
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#include <nrfx.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @defgroup nrfx_gppi Generic PPI layer
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* @{
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* @ingroup nrfx
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* @ingroup nrf_dppi
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* @ingroup nrf_ppi
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*
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* @brief Helper layer that provides the common functionality of PPI and DPPI drivers.
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*
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* Use PPI and DPPI drivers directly.
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* This layer is provided only to help create generic code that can be built
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* for SoCs equipped with either of these peripherals. When using this layer,
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* take into account that there are significant differences between the PPI and DPPI
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* interfaces that affect the behavior of this layer.
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*
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* One difference is that PPI allows associating of one task or event with
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* more than one channel, whereas DPPI does not allow this. In DPPI, the second
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* association overwrites the first one. Consequently, this helper layer cannot
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* be used in applications that need to connect a task or event to multiple
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* channels.
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*
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* Another difference is that in DPPI one channel can be associated with
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* multiple tasks and multiple events, while in PPI this is not possible (with
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* the exception of the association of a second task as a fork). Because of
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* this difference, it is important to clear the previous endpoints of the channel that
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* is to be reused with some different ones. Otherwise, the behavior of this
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* helper layer will be different, depending on the actual interface used:
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* in DPPI the channel configuration will be extended with the new endpoints, and
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* in PPI the new endpoints will replace the previous ones.
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*/
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#if defined(PPI_PRESENT)
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#include <hal/nrf_ppi.h>
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typedef enum
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{
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NRFX_GPPI_CHANNEL_GROUP0 = NRF_PPI_CHANNEL_GROUP0,
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NRFX_GPPI_CHANNEL_GROUP1 = NRF_PPI_CHANNEL_GROUP1,
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NRFX_GPPI_CHANNEL_GROUP2 = NRF_PPI_CHANNEL_GROUP2,
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NRFX_GPPI_CHANNEL_GROUP3 = NRF_PPI_CHANNEL_GROUP3,
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#if (PPI_GROUP_NUM > 4)
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NRFX_GPPI_CHANNEL_GROUP4 = NRF_PPI_CHANNEL_GROUP4,
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NRFX_GPPI_CHANNEL_GROUP5 = NRF_PPI_CHANNEL_GROUP5,
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#endif
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} nrfx_gppi_channel_group_t;
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typedef enum
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{
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NRFX_GPPI_TASK_CHG0_EN = NRF_PPI_TASK_CHG0_EN,
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NRFX_GPPI_TASK_CHG0_DIS = NRF_PPI_TASK_CHG0_DIS,
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NRFX_GPPI_TASK_CHG1_EN = NRF_PPI_TASK_CHG1_EN,
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NRFX_GPPI_TASK_CHG1_DIS = NRF_PPI_TASK_CHG1_DIS,
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NRFX_GPPI_TASK_CHG2_EN = NRF_PPI_TASK_CHG2_EN,
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NRFX_GPPI_TASK_CHG2_DIS = NRF_PPI_TASK_CHG2_DIS,
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NRFX_GPPI_TASK_CHG3_EN = NRF_PPI_TASK_CHG3_EN,
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NRFX_GPPI_TASK_CHG3_DIS = NRF_PPI_TASK_CHG3_DIS,
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#if (PPI_GROUP_NUM > 4)
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NRFX_GPPI_TASK_CHG4_EN = NRF_PPI_TASK_CHG4_EN,
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NRFX_GPPI_TASK_CHG4_DIS = NRF_PPI_TASK_CHG4_DIS,
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NRFX_GPPI_TASK_CHG5_EN = NRF_PPI_TASK_CHG5_EN,
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NRFX_GPPI_TASK_CHG5_DIS = NRF_PPI_TASK_CHG5_DIS
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#endif
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} nrfx_gppi_task_t;
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#elif defined(DPPI_PRESENT)
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#include <hal/nrf_dppi.h>
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typedef enum
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{
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NRFX_GPPI_CHANNEL_GROUP0 = NRF_DPPI_CHANNEL_GROUP0,
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NRFX_GPPI_CHANNEL_GROUP1 = NRF_DPPI_CHANNEL_GROUP1,
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NRFX_GPPI_CHANNEL_GROUP2 = NRF_DPPI_CHANNEL_GROUP2,
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NRFX_GPPI_CHANNEL_GROUP3 = NRF_DPPI_CHANNEL_GROUP3,
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NRFX_GPPI_CHANNEL_GROUP4 = NRF_DPPI_CHANNEL_GROUP4,
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NRFX_GPPI_CHANNEL_GROUP5 = NRF_DPPI_CHANNEL_GROUP5,
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} nrfx_gppi_channel_group_t;
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typedef enum
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{
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NRFX_GPPI_TASK_CHG0_EN = NRF_DPPI_TASK_CHG0_EN,
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NRFX_GPPI_TASK_CHG0_DIS = NRF_DPPI_TASK_CHG0_DIS,
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NRFX_GPPI_TASK_CHG1_EN = NRF_DPPI_TASK_CHG1_EN,
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NRFX_GPPI_TASK_CHG1_DIS = NRF_DPPI_TASK_CHG1_DIS,
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NRFX_GPPI_TASK_CHG2_EN = NRF_DPPI_TASK_CHG2_EN,
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NRFX_GPPI_TASK_CHG2_DIS = NRF_DPPI_TASK_CHG2_DIS,
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NRFX_GPPI_TASK_CHG3_EN = NRF_DPPI_TASK_CHG3_EN,
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NRFX_GPPI_TASK_CHG3_DIS = NRF_DPPI_TASK_CHG3_DIS,
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NRFX_GPPI_TASK_CHG4_EN = NRF_DPPI_TASK_CHG4_EN,
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NRFX_GPPI_TASK_CHG4_DIS = NRF_DPPI_TASK_CHG4_DIS,
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NRFX_GPPI_TASK_CHG5_EN = NRF_DPPI_TASK_CHG5_EN,
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NRFX_GPPI_TASK_CHG5_DIS = NRF_DPPI_TASK_CHG5_DIS
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} nrfx_gppi_task_t;
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#elif defined(__NRFX_DOXYGEN__)
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/** @brief Generic PPI channel groups. */
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typedef enum
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{
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NRFX_GPPI_CHANNEL_GROUP0, /**< Channel group 0.*/
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NRFX_GPPI_CHANNEL_GROUP1, /**< Channel group 1.*/
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NRFX_GPPI_CHANNEL_GROUP2, /**< Channel group 2.*/
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NRFX_GPPI_CHANNEL_GROUP3, /**< Channel group 3.*/
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NRFX_GPPI_CHANNEL_GROUP4, /**< Channel group 4.*/
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NRFX_GPPI_CHANNEL_GROUP5, /**< Channel group 5.*/
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} nrfx_gppi_channel_group_t;
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/** @brief Generic PPI tasks. */
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typedef enum
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{
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NRFX_GPPI_TASK_CHG0_EN, /**< Task for enabling channel group 0 */
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NRFX_GPPI_TASK_CHG0_DIS, /**< Task for disabling channel group 0 */
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NRFX_GPPI_TASK_CHG1_EN, /**< Task for enabling channel group 1 */
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NRFX_GPPI_TASK_CHG1_DIS, /**< Task for disabling channel group 1 */
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NRFX_GPPI_TASK_CHG2_EN, /**< Task for enabling channel group 2 */
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NRFX_GPPI_TASK_CHG2_DIS, /**< Task for disabling channel group 2 */
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NRFX_GPPI_TASK_CHG3_EN, /**< Task for enabling channel group 3 */
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NRFX_GPPI_TASK_CHG3_DIS, /**< Task for disabling channel group 3 */
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NRFX_GPPI_TASK_CHG4_EN, /**< Task for enabling channel group 4 */
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NRFX_GPPI_TASK_CHG4_DIS, /**< Task for disabling channel group 4 */
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NRFX_GPPI_TASK_CHG5_EN, /**< Task for enabling channel group 5 */
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NRFX_GPPI_TASK_CHG5_DIS, /**< Task for disabling channel group 5 */
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} nrfx_gppi_task_t;
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#endif // defined(__NRFX_DOXYGEN__)
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/**
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* @brief Function for checking if a given channel is enabled.
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*
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* @param[in] channel Channel to check.
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*
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* @retval true The channel is enabled.
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* @retval false The channel is not enabled.
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*/
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__STATIC_INLINE bool nrfx_gppi_channel_check(uint8_t channel);
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/** @brief Function for disabling all channels. */
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__STATIC_INLINE void nrfx_gppi_channels_disable_all(void);
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/**
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* @brief Function for enabling multiple channels.
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*
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* The bits in @c mask value correspond to particular channels. This means that
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* writing 1 to bit 0 enables channel 0, writing 1 to bit 1 enables channel 1, etc.
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*
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* @param[in] mask Channel mask.
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*/
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__STATIC_INLINE void nrfx_gppi_channels_enable(uint32_t mask);
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/**
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* @brief Function for disabling multiple channels.
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*
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* The bits in @c mask value correspond to particular channels. This means that
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* writing 1 to bit 0 disables channel 0, writing 1 to bit 1 disables channel 1, etc.
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*
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* @param[in] mask Channel mask.
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*/
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__STATIC_INLINE void nrfx_gppi_channels_disable(uint32_t mask);
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/**
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* @brief Function for associating a given channel with the specified event register.
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*
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* This function sets the DPPI publish configuration for a given event
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* or sets the PPI event endpoint register.
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*
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* @param[in] channel Channel to which to assign the event.
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* @param[in] eep Address of the event register.
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*/
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__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep);
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/**
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* @brief Function for associating a given channel with the specified task register.
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*
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* This function sets the DPPI subscribe configuration for a given task
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* or sets the PPI task endpoint register.
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*
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* @param[in] channel Channel to which to assign the task.
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* @param[in] tep Address of the task register.
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*/
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__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep);
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/**
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* @brief Function for setting up the event and task endpoints for a given channel.
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*
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* @param[in] channel Channel to which the given endpoints are assigned.
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* @param[in] eep Address of the event register.
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* @param[in] tep Address of the task register.
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*/
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__STATIC_INLINE void nrfx_gppi_channel_endpoints_setup(uint8_t channel,
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uint32_t eep,
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uint32_t tep);
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/**
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* @brief Function for clearing the DPPI publish configuration for a given event
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* register or for clearing the PPI event endpoint register.
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*
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* @param[in] channel Channel for which to clear the event endpoint. Not used in DPPI.
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* @param[in] eep Address of the event register. Not used in PPI.
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*/
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__STATIC_INLINE void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep);
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/**
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* @brief Function for clearing the DPPI subscribe configuration for a given task
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* register or for clearing the PPI task endpoint register.
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*
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* @param[in] channel Channel from which to disconnect the task enpoint. Not used in DPPI.
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* @param[in] tep Address of the task register. Not used in PPI.
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*/
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__STATIC_INLINE void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep);
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#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
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/**
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* @brief Function for setting up the task endpoint for a given PPI fork or for
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* associating the DPPI channel with an additional task register.
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*
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* @param[in] channel Channel to which the given fork endpoint is assigned.
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* @param[in] fork_tep Address of the task register.
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*/
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__STATIC_INLINE void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep);
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/**
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* @brief Function for clearing the task endpoint for a given PPI fork or for clearing
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* the DPPI subscribe register.
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*
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* @param[in] channel Channel for which to clear the fork endpoint. Not used in DPPI.
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* @param[in] fork_tep Address of the task register. Not used in PPI.
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*/
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__STATIC_INLINE void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep);
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#endif // defined(PPI_FEATURE_FORKS_PRESENT) || defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
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/**
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* @brief Function for including multiple channels in a channel group.
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*
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* @param[in] channel_mask Channels to be included in the group.
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* @param[in] channel_group Channel group.
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*/
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__STATIC_INLINE void nrfx_gppi_channels_include_in_group(uint32_t channel_mask,
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nrfx_gppi_channel_group_t channel_group);
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/**
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* @brief Function for removing multiple channels from a channel group.
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*
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* @param[in] channel_mask Channels to be removed from the group.
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* @param[in] channel_group Channel group.
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*/
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__STATIC_INLINE void nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,
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nrfx_gppi_channel_group_t channel_group);
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/**
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* @brief Function for removing all channels from a channel group.
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*
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* @param[in] channel_group Channel group.
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*/
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__STATIC_INLINE void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group);
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/**
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* @brief Function for enabling a channel group.
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*
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* @param[in] channel_group Channel group.
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*/
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__STATIC_INLINE void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group);
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/**
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* @brief Function for disabling a group.
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*
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* @param[in] channel_group Channel group.
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|
|
*/
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for activating a task.
|
||
|
|
*
|
||
|
|
* @param[in] task Task to be activated.
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_trigger(nrfx_gppi_task_t task);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for returning the address of a specific task register.
|
||
|
|
*
|
||
|
|
* @param[in] task PPI or DPPI task.
|
||
|
|
*
|
||
|
|
* @return Address of the requested task register.
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t task);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for returning the address of a channel group disable task.
|
||
|
|
*
|
||
|
|
* @param[in] group Channel group.
|
||
|
|
*
|
||
|
|
* @return Disable task address of the specified group.
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for returning the address of a channel group enable task.
|
||
|
|
*
|
||
|
|
* @param[in] group Channel group.
|
||
|
|
*
|
||
|
|
* @return Enable task address of the specified group.
|
||
|
|
*/
|
||
|
|
__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group);
|
||
|
|
|
||
|
|
/** @} */
|
||
|
|
|
||
|
|
#if defined(PPI_PRESENT)
|
||
|
|
|
||
|
|
__STATIC_INLINE bool nrfx_gppi_channel_check(uint8_t channel)
|
||
|
|
{
|
||
|
|
return (nrf_ppi_channel_enable_get((nrf_ppi_channel_t)channel) == NRF_PPI_CHANNEL_ENABLED);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_disable_all(void)
|
||
|
|
{
|
||
|
|
nrf_ppi_channel_disable_all();
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_enable(uint32_t mask)
|
||
|
|
{
|
||
|
|
nrf_ppi_channels_enable(mask);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_disable(uint32_t mask)
|
||
|
|
{
|
||
|
|
nrf_ppi_channels_disable(mask);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep)
|
||
|
|
{
|
||
|
|
nrf_ppi_event_endpoint_setup((nrf_ppi_channel_t)channel, eep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep)
|
||
|
|
{
|
||
|
|
nrf_ppi_task_endpoint_setup((nrf_ppi_channel_t)channel, tep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channel_endpoints_setup(uint8_t channel,
|
||
|
|
uint32_t eep,
|
||
|
|
uint32_t tep)
|
||
|
|
{
|
||
|
|
nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)channel, eep, tep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep)
|
||
|
|
{
|
||
|
|
(void)eep;
|
||
|
|
nrf_ppi_event_endpoint_setup((nrf_ppi_channel_t)channel, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep)
|
||
|
|
{
|
||
|
|
(void)tep;
|
||
|
|
nrf_ppi_task_endpoint_setup((nrf_ppi_channel_t)channel, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(PPI_FEATURE_FORKS_PRESENT)
|
||
|
|
__STATIC_INLINE void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep)
|
||
|
|
{
|
||
|
|
nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)channel, fork_tep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep)
|
||
|
|
{
|
||
|
|
(void)fork_tep;
|
||
|
|
nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)channel, 0);
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_include_in_group(uint32_t channel_mask,
|
||
|
|
nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_ppi_channels_include_in_group(channel_mask, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,
|
||
|
|
nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_ppi_channels_remove_from_group(channel_mask, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_ppi_channel_group_clear(channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_ppi_group_enable(channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_ppi_group_disable(channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_trigger(nrfx_gppi_task_t task)
|
||
|
|
{
|
||
|
|
nrf_ppi_task_trigger(task);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t task)
|
||
|
|
{
|
||
|
|
return (uint32_t)nrf_ppi_task_address_get(task);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group)
|
||
|
|
{
|
||
|
|
return (nrfx_gppi_task_t)nrf_ppi_group_disable_task_get((uint8_t)group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group)
|
||
|
|
{
|
||
|
|
return (nrfx_gppi_task_t)nrf_ppi_group_enable_task_get((uint8_t)group);
|
||
|
|
}
|
||
|
|
|
||
|
|
#elif defined(DPPI_PRESENT)
|
||
|
|
|
||
|
|
__STATIC_INLINE bool nrfx_gppi_channel_check(uint8_t channel)
|
||
|
|
{
|
||
|
|
return nrf_dppi_channel_check(NRF_DPPIC, channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_disable_all(void)
|
||
|
|
{
|
||
|
|
nrf_dppi_channels_disable_all(NRF_DPPIC);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_enable(uint32_t mask)
|
||
|
|
{
|
||
|
|
nrf_dppi_channels_enable(NRF_DPPIC, mask);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_disable(uint32_t mask)
|
||
|
|
{
|
||
|
|
nrf_dppi_channels_disable(NRF_DPPIC, mask);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_trigger(nrfx_gppi_task_t task)
|
||
|
|
{
|
||
|
|
nrf_dppi_task_trigger(NRF_DPPIC, task);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep)
|
||
|
|
{
|
||
|
|
NRFX_ASSERT(eep);
|
||
|
|
*((volatile uint32_t *)(eep + 0x80uL)) = ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep)
|
||
|
|
{
|
||
|
|
NRFX_ASSERT(tep);
|
||
|
|
*((volatile uint32_t *)(tep + 0x80uL)) = ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channel_endpoints_setup(uint8_t channel,
|
||
|
|
uint32_t eep,
|
||
|
|
uint32_t tep)
|
||
|
|
{
|
||
|
|
nrfx_gppi_event_endpoint_setup(channel, eep);
|
||
|
|
nrfx_gppi_task_endpoint_setup(channel, tep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep)
|
||
|
|
{
|
||
|
|
NRFX_ASSERT(eep);
|
||
|
|
(void)channel;
|
||
|
|
*((volatile uint32_t *)(eep + 0x80uL)) = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep)
|
||
|
|
{
|
||
|
|
NRFX_ASSERT(tep);
|
||
|
|
(void)channel;
|
||
|
|
*((volatile uint32_t *)(tep + 0x80uL)) = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep)
|
||
|
|
{
|
||
|
|
nrfx_gppi_task_endpoint_setup(channel, fork_tep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep)
|
||
|
|
{
|
||
|
|
nrfx_gppi_task_endpoint_clear(channel, fork_tep);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_include_in_group(uint32_t channel_mask,
|
||
|
|
nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_dppi_channels_include_in_group(NRF_DPPIC, channel_mask, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,
|
||
|
|
nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_dppi_channels_remove_from_group(NRF_DPPIC, channel_mask, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_dppi_group_clear(NRF_DPPIC, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_dppi_group_enable(NRF_DPPIC, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group)
|
||
|
|
{
|
||
|
|
nrf_dppi_group_disable(NRF_DPPIC, channel_group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t gppi_task)
|
||
|
|
{
|
||
|
|
return (uint32_t) ((uint8_t *) NRF_DPPIC + (uint32_t) gppi_task);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group)
|
||
|
|
{
|
||
|
|
return (nrfx_gppi_task_t) nrf_dppi_group_disable_task_get((uint8_t)group);
|
||
|
|
}
|
||
|
|
|
||
|
|
__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group)
|
||
|
|
{
|
||
|
|
return (nrfx_gppi_task_t) nrf_dppi_group_enable_task_get((uint8_t)group);
|
||
|
|
}
|
||
|
|
|
||
|
|
#else
|
||
|
|
#error "Neither PPI nor DPPI is present in the SoC currently in use."
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif // NRFX_GPPI_H
|