386 lines
17 KiB
C
386 lines
17 KiB
C
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/**
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* Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef NRFX_SPIM_H__
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#define NRFX_SPIM_H__
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#include <nrfx.h>
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#include <hal/nrf_spim.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @defgroup nrfx_spim SPIM driver
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* @{
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* @ingroup nrf_spim
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* @brief Serial Peripheral Interface Master with EasyDMA (SPIM) driver.
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*/
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/** @brief Data structure of the Serial Peripheral Interface Master with EasyDMA (SPIM) driver instance. */
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typedef struct
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{
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NRF_SPIM_Type * p_reg; ///< Pointer to a structure with SPIM registers.
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uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
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} nrfx_spim_t;
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#ifndef __NRFX_DOXYGEN__
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enum {
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#if NRFX_CHECK(NRFX_SPIM0_ENABLED)
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NRFX_SPIM0_INST_IDX,
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#endif
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#if NRFX_CHECK(NRFX_SPIM1_ENABLED)
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NRFX_SPIM1_INST_IDX,
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#endif
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#if NRFX_CHECK(NRFX_SPIM2_ENABLED)
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NRFX_SPIM2_INST_IDX,
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#endif
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#if NRFX_CHECK(NRFX_SPIM3_ENABLED)
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NRFX_SPIM3_INST_IDX,
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#endif
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NRFX_SPIM_ENABLED_COUNT
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};
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#endif
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/** @brief Macro for creating an instance of the SPIM driver. */
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#define NRFX_SPIM_INSTANCE(id) \
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{ \
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.p_reg = NRFX_CONCAT_2(NRF_SPIM, id), \
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.drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIM, id, _INST_IDX), \
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}
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/**
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* @brief This value can be provided instead of a pin number for signals MOSI,
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* MISO, and Slave Select to specify that the given signal is not used and
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* therefore does not need to be connected to a pin.
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*/
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#define NRFX_SPIM_PIN_NOT_USED 0xFF
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/** @brief Configuration structure of the SPIM driver instance. */
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typedef struct
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{
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uint8_t sck_pin; ///< SCK pin number.
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uint8_t mosi_pin; ///< MOSI pin number (optional).
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/**< Set to @ref NRFX_SPIM_PIN_NOT_USED
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* if this signal is not needed. */
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uint8_t miso_pin; ///< MISO pin number (optional).
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/**< Set to @ref NRFX_SPIM_PIN_NOT_USED
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* if this signal is not needed. */
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uint8_t ss_pin; ///< Slave Select pin number (optional).
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/**< Set to @ref NRFX_SPIM_PIN_NOT_USED
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* if this signal is not needed. */
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bool ss_active_high; ///< Polarity of the Slave Select pin during transmission.
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uint8_t irq_priority; ///< Interrupt priority.
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uint8_t orc; ///< Overrun character.
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/**< This character is used when all bytes from the TX buffer are sent,
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but the transfer continues due to RX. */
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nrf_spim_frequency_t frequency; ///< SPIM frequency.
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nrf_spim_mode_t mode; ///< SPIM mode.
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nrf_spim_bit_order_t bit_order; ///< SPIM bit order.
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#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
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uint8_t dcx_pin; ///< D/CX pin number (optional).
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uint8_t rx_delay; ///< Sample delay for input serial data on MISO.
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/**< The value specifies the delay, in number of 64 MHz clock cycles
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* (15.625 ns), from the the sampling edge of SCK (leading edge for
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* CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until
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* the input serial data is sampled. */
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bool use_hw_ss; ///< Indication to use software or hardware controlled Slave Select pin.
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uint8_t ss_duration; ///< Slave Select duration before and after transmission.
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/**< Minimum duration between the edge of CSN and the edge of SCK and minimum
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* duration of CSN must stay inactive between transactions.
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* The value is specified in number of 64 MHz clock cycles (15.625 ns).
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* Supported only for hardware-controlled Slave Select. */
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#endif
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} nrfx_spim_config_t;
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#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
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/**
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* @brief Extended default configuration of the SPIM instance.
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*/
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#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
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.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \
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.rx_delay = 0x02, \
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.use_hw_ss = false, \
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.ss_duration = 0x02,
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#else
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#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG
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#endif
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/** @brief The default configuration of the SPIM master instance. */
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#define NRFX_SPIM_DEFAULT_CONFIG \
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{ \
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.sck_pin = NRFX_SPIM_PIN_NOT_USED, \
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.mosi_pin = NRFX_SPIM_PIN_NOT_USED, \
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.miso_pin = NRFX_SPIM_PIN_NOT_USED, \
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.ss_pin = NRFX_SPIM_PIN_NOT_USED, \
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.ss_active_high = false, \
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.irq_priority = NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY, \
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.orc = 0xFF, \
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.frequency = NRF_SPIM_FREQ_4M, \
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.mode = NRF_SPIM_MODE_0, \
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.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST, \
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NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
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}
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/** @brief Flag indicating that TX buffer address will be incremented after transfer. */
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#define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0)
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/** @brief Flag indicating that RX buffer address will be incremented after transfer. */
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#define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1)
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/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
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#define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
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/** @brief Flag indicating that the transfer will be set up, but not started. */
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#define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3)
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/** @brief Flag indicating that the transfer will be executed multiple times. */
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#define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4)
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/** @brief Single transfer descriptor structure. */
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typedef struct
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{
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uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
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size_t tx_length; ///< TX buffer length.
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uint8_t * p_rx_buffer; ///< Pointer to RX buffer.
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size_t rx_length; ///< RX buffer length.
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} nrfx_spim_xfer_desc_t;
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/**
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* @brief Macro for setting up single transfer descriptor.
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*
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* This macro is for internal use only.
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*/
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#define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
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{ \
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.p_tx_buffer = (uint8_t const *)(p_tx), \
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.tx_length = (tx_len), \
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.p_rx_buffer = (p_rx), \
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.rx_length = (rx_len), \
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}
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/** @brief Macro for setting the duplex TX RX transfer. */
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#define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
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NRFX_SPIM_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
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/** @brief Macro for setting the TX transfer. */
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#define NRFX_SPIM_XFER_TX(p_buf, length) \
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NRFX_SPIM_SINGLE_XFER(p_buf, length, NULL, 0)
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/** @brief Macro for setting the RX transfer. */
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#define NRFX_SPIM_XFER_RX(p_buf, length) \
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NRFX_SPIM_SINGLE_XFER(NULL, 0, p_buf, length)
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/**
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* @brief SPIM master driver event types, passed to the handler routine provided
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* during initialization.
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*/
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typedef enum
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{
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NRFX_SPIM_EVENT_DONE, ///< Transfer done.
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} nrfx_spim_evt_type_t;
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/** @brief SPIM event description with transmission details. */
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typedef struct
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{
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nrfx_spim_evt_type_t type; ///< Event type.
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nrfx_spim_xfer_desc_t xfer_desc; ///< Transfer details.
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} nrfx_spim_evt_t;
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/** @brief SPIM driver event handler type. */
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typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event,
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void * p_context);
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/**
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* @brief Function for initializing the SPIM driver instance.
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*
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* This function configures and enables the specified peripheral.
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*
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* @param[in] p_instance Pointer to the driver instance structure.
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* @param[in] p_config Pointer to the structure with the initial configuration.
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* @param[in] handler Event handler provided by the user. If NULL, transfers
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* will be performed in blocking mode.
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* @param[in] p_context Context passed to event handler.
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*
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* @retval NRFX_SUCCESS Initialization was successful.
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* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
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* @retval NRFX_ERROR_BUSY Some other peripheral with the same
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* instance ID is already in use. This is
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* possible only if @ref nrfx_prs module
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* is enabled.
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* @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
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* by the SPIM instance.
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*/
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nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
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nrfx_spim_config_t const * p_config,
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nrfx_spim_evt_handler_t handler,
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void * p_context);
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/**
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* @brief Function for uninitializing the SPIM driver instance.
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*
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* @param[in] p_instance Pointer to the driver instance structure.
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*/
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void nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
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/**
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* @brief Function for starting the SPIM data transfer.
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*
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* Additional options are provided using the @c flags parameter:
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*
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* - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC -
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* Post-incrementation of buffer addresses.
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* - @ref NRFX_SPIM_FLAG_HOLD_XFER - Driver is not starting the transfer. Use this
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* flag if the transfer is triggered externally by PPI. Use
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* @ref nrfx_spim_start_task_get to get the address of the start task.
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* - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer
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* completion. This also means no interrupt at the end of the transfer.
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* If @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into
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* busy state, so you must ensure that the next transfers are set up when SPIM is not active.
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* @ref nrfx_spim_end_event_get function can be used to detect end of transfer. Option can be used
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* together with @ref NRFX_SPIM_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers
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* without interruptions.
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* - @ref NRFX_SPIM_FLAG_REPEATED_XFER - Prepare for repeated transfers. You can set
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* up a number of transfers that will be triggered externally (for example by PPI). An example is
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* a TXRX transfer with the options @ref NRFX_SPIM_FLAG_RX_POSTINC,
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* @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_SPIM_FLAG_REPEATED_XFER. After the
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* transfer is set up, a set of transfers can be triggered by PPI that will read, for example,
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* the same register of an external component and put it into a RAM buffer without any interrupts.
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* @ref nrfx_spim_end_event_get can be used to get the address of the END event, which can be
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* used to count the number of transfers. If @ref NRFX_SPIM_FLAG_REPEATED_XFER is used,
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* the driver does not set the instance into busy state, so you must ensure that the next
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* transfers are set up when SPIM is not active.
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*
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* @note Peripherals using EasyDMA (including SPIM) require the transfer buffers
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* to be placed in the Data RAM region. If this condition is not met,
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* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
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*
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* @param p_instance Pointer to the driver instance structure.
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* @param p_xfer_desc Pointer to the transfer descriptor.
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* @param flags Transfer options (0 for default settings).
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*
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* @retval NRFX_SUCCESS The procedure is successful.
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* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
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* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
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* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
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* RAM region.
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*/
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nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance,
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nrfx_spim_xfer_desc_t const * p_xfer_desc,
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uint32_t flags);
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#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
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/**
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* @brief Function for starting the SPIM data transfer with DCX control.
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*
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* See @ref nrfx_spim_xfer for description of additional options of transfer
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* provided by the @c flags parameter.
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*
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* @note Peripherals that use EasyDMA (including SPIM) require the transfer buffers
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* to be placed in the Data RAM region. If this condition is not met,
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* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
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*
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* @param p_instance Pointer to the driver instance structure.
|
||
|
|
* @param p_xfer_desc Pointer to the transfer descriptor.
|
||
|
|
* @param flags Transfer options (0 for default settings).
|
||
|
|
* @param cmd_length Length of the command bytes preceding the data
|
||
|
|
* bytes. The DCX line will be low during transmission
|
||
|
|
* of command bytes and high during transmission of data bytes.
|
||
|
|
* Maximum value available for dividing the transmitted bytes
|
||
|
|
* into command bytes and data bytes is @ref NRF_SPIM_DCX_CNT_ALL_CMD - 1.
|
||
|
|
* The @ref NRF_SPIM_DCX_CNT_ALL_CMD value passed as the
|
||
|
|
* @c cmd_length parameter causes all transmitted bytes
|
||
|
|
* to be marked as command bytes.
|
||
|
|
*
|
||
|
|
* @retval NRFX_SUCCESS The procedure is successful.
|
||
|
|
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
|
||
|
|
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
|
||
|
|
* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
|
||
|
|
* RAM region.
|
||
|
|
*/
|
||
|
|
nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance,
|
||
|
|
nrfx_spim_xfer_desc_t const * p_xfer_desc,
|
||
|
|
uint32_t flags,
|
||
|
|
uint8_t cmd_length);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for returning the address of a SPIM start task.
|
||
|
|
*
|
||
|
|
* This function is to be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER.
|
||
|
|
* In that case, the transfer is not started by the driver, but it must be started externally by PPI.
|
||
|
|
*
|
||
|
|
* @param[in] p_instance Pointer to the driver instance structure.
|
||
|
|
*
|
||
|
|
* @return Start task address.
|
||
|
|
*/
|
||
|
|
uint32_t nrfx_spim_start_task_get(nrfx_spim_t const * p_instance);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for returning the address of a END SPIM event.
|
||
|
|
*
|
||
|
|
* The END event can be used to detect the end of a transfer
|
||
|
|
* if the @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER option is used.
|
||
|
|
*
|
||
|
|
* @param[in] p_instance Pointer to the driver instance structure.
|
||
|
|
*
|
||
|
|
* @return END event address.
|
||
|
|
*/
|
||
|
|
uint32_t nrfx_spim_end_event_get(nrfx_spim_t const * p_instance);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Function for aborting ongoing transfer.
|
||
|
|
*
|
||
|
|
* @param[in] p_instance Pointer to the driver instance structure.
|
||
|
|
*/
|
||
|
|
void nrfx_spim_abort(nrfx_spim_t const * p_instance);
|
||
|
|
|
||
|
|
/** @} */
|
||
|
|
|
||
|
|
|
||
|
|
void nrfx_spim_0_irq_handler(void);
|
||
|
|
void nrfx_spim_1_irq_handler(void);
|
||
|
|
void nrfx_spim_2_irq_handler(void);
|
||
|
|
void nrfx_spim_3_irq_handler(void);
|
||
|
|
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif // NRFX_SPIM_H__
|