61 lines
3.6 KiB
C
61 lines
3.6 KiB
C
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/**************************************************************************************
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* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
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* *
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* This file and the related binary are licensed under the following license: *
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* *
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* ARM Object Code and Header Files License, v1.0 Redistribution. *
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* *
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* Redistribution and use of object code, header files, and documentation, without *
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* modification, are permitted provided that the following conditions are met: *
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* *
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* 1) Redistributions must reproduce the above copyright notice and the *
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* following disclaimer in the documentation and/or other materials *
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* provided with the distribution. *
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* *
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* 2) Unless to the extent explicitly permitted by law, no reverse *
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* engineering, decompilation, or disassembly of is permitted. *
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* *
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* 3) Redistribution and use is permitted solely for the purpose of *
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* developing or executing applications that are targeted for use *
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* on an ARM-based product. *
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* *
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* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
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* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
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* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
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**************************************************************************************/
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#ifndef __DX_REG_BASE_HOST_H__
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#define __DX_REG_BASE_HOST_H__
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/* Identify platform: Xilinx Zynq7000 ZC706 */
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#define DX_PLAT_ZYNQ7000 1
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#define DX_PLAT_ZYNQ7000_ZC706 1
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/* SEP core clock frequency in MHz */
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#define DX_SEP_FREQ_MHZ 64
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#if defined(CRYPTOCELL_ARCH_BASE_ADDRESS)
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#define DX_BASE_CC CRYPTOCELL_ARCH_BASE_ADDRESS
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#else
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#error Please set CRYPTOCELL_ARCH_BASE_ADDRESS to a non-negative number
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#endif
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#define DX_BASE_ENV_REGS 0x40008000
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#define DX_BASE_ENV_CC_MEMORIES 0x40008000
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#define DX_BASE_ENV_FLASH 0x40008700
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#define DX_BASE_ENV_PERF_RAM 0x40009000
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#define DX_BASE_HOST_RGF 0x0UL
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#define DX_BASE_CRY_KERNEL 0x0UL
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#define DX_BASE_ROM 0x40000000
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#define DX_BASE_RNG 0x0000UL
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#endif /*__DX_REG_BASE_HOST_H__*/
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