366 lines
13 KiB
C
366 lines
13 KiB
C
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/**
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* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef LPS22HB_INTERNAL_H
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#define LPS22HB_INTERNAL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LPS22HB_BYTES_PER_SAMPLE 5
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/**
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* @brief LPS22HB sensor registers.
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*/
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#define LPS22HB_REG_INTERRUPT_CONFIG 0x0B
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#define LPS22HB_REG_THS_P_L 0x0C
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#define LPS22HB_REG_THS_P_H 0x0D
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#define LPS22HB_REG_WHO_AM_I 0x0F
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#define LPS22HB_REG_CTRL1 0x10
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#define LPS22HB_REG_CTRL2 0x11
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#define LPS22HB_REG_CTRL3 0x12
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#define LPS22HB_REG_FIFO_CTRL 0x14
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#define LPS22HB_REG_REF_P_XL 0x15
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#define LPS22HB_REG_REF_P_L 0x16
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#define LPS22HB_REG_REF_P_H 0x17
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#define LPS22HB_REG_RPDS_L 0x18
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#define LPS22HB_REG_RPDS_H 0x19
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#define LPS22HB_REG_RES_CONF 0x1A
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#define LPS22HB_REG_INT_SOURCE 0x25
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#define LPS22HB_REG_FIFO_STATUS 0x26
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#define LPS22HB_REG_STATUS 0x27
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#define LPS22HB_REG_PRESS_OUT_XL 0x28
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#define LPS22HB_REG_PRESS_OUT_L 0x29
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#define LPS22HB_REG_PRESS_OUT_H 0x2A
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#define LPS22HB_REG_TEMP_OUT_L 0x2B
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#define LPS22HB_REG_TEMP_OUT_H 0x2C
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#define LPS22HB_REG_LPFP_RES 0x33
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/**
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* @brief Interrupt config register bitmasks.
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*/
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// Bitmasks for AUTORIFP.
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#define LPS22HB_AUTORIFP_POS 7
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#define LPS22HB_AUTORIFP_MASK (1 << LPS22HB_AUTORIFP_POS)
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// Bitmasks for RESET_ARP.
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#define LPS22HB_RESET_ARP_POS 6
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#define LPS22HB_RESET_ARP_MASK (1 << LPS22HB_RESET_ARP_POS)
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// Bitmasks for AUTOZERO.
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#define LPS22HB_AUTOZERO_POS 5
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#define LPS22HB_AUTOZERO_MASK (1 << LPS22HB_AUTOZERO_POS)
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// Bitmasks for RESET_AZ.
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#define LPS22HB_RESET_AZ_POS 4
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#define LPS22HB_RESET_AZ_MASK (1 << LPS22HB_RESET_AZ_POS)
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// Bitmasks for DIFF_EN.
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#define LPS22HB_DIFF_EN_POS 3
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#define LPS22HB_DIFF_EN_MASK (1 << LPS22HB_DIFF_EN_POS)
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// Bitmasks for LIR.
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#define LPS22HB_LIR_POS 2
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#define LPS22HB_LIR_MASK (1 << LPS22HB_LIR_POS)
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// Bitmasks for PLE.
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#define LPS22HB_PLE_POS 1
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#define LPS22HB_PLE_MASK (1 << LPS22HB_PLE_POS)
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// Bitmasks for PHE.
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#define LPS22HB_PHE_POS 0
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#define LPS22HB_PHE_MASK (1 << LPS22HB_PHE_POS)
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/**
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* @brief Control register 1 bitmasks.
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*/
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// Register validity bitmask.
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#define LPS22HB_CTRL1_VALID_MASK 0x80
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// Bitmasks for ODR.
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#define LPS22HB_ODR_POS 4
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#define LPS22HB_ODR_MASK (7 << LPS22HB_ODR_POS)
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// Bitmasks for EN_LPFP.
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#define LPS22HB_EN_LPFP_POS 3
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#define LPS22HB_EN_LPFP_MASK (1 << LPS22HB_EN_LPFP_POS)
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// Bitmasks for LPFP_CFG.
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#define LPS22HB_LPFP_CFG_POS 2
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#define LPS22HB_LPFP_CFG_MASK (1 << LPS22HB_LPFP_CFG_POS)
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// Bitmasks for BDU.
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#define LPS22HB_BDU_POS 1
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#define LPS22HB_BDU_MASK (1 << LPS22HB_BDU_POS)
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// Bitmasks for SIM.
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#define LPS22HB_SIM_POS 0
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#define LPS22HB_SIM_MASK (1 << LPS22HB_SIM_POS)
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/**
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* @brief Control register 2 bitmasks.
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*/
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// Register validity bitmask.
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#define LPS22HB_CTRL2_VALID_MASK 0x02
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// Bitmasks for BOOT.
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#define LPS22HB_BOOT_POS 7
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#define LPS22HB_BOOT_MASK (1 << LPS22HB_BOOT_POS)
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// Bitmasks for FIFO_EN.
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#define LPS22HB_FIFO_EN_POS 6
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#define LPS22HB_FIFO_EN_MASK (1 << LPS22HB_FIFO_EN_POS)
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// Bitmasks for STOP_ON_FTH.
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#define LPS22HB_STOP_ON_FTH_POS 5
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#define LPS22HB_STOP_ON_FTH_MASK (1 << LPS22HB_STOP_ON_FTH_POS)
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// Bitmasks for IF_ADD_INC.
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#define LPS22HB_IF_ADD_INC_POS 4
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#define LPS22HB_IF_ADD_INC_MASK (1 << LPS22HB_IF_ADD_INC_POS)
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// Bitmasks for I2C_DIS.
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#define LPS22HB_I2C_DIS_POS 3
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#define LPS22HB_I2C_DIS_MASK (1 << LPS22HB_I2C_DIS_POS)
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// Bitmasks for SWRESET.
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#define LPS22HB_SWRESET_POS 2
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#define LPS22HB_SWRESET_MASK (1 << LPS22HB_SWRESET_POS)
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// Bitmasks for ONE_SHOT.
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#define LPS22HB_ONE_SHOT_POS 0
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#define LPS22HB_ONE_SHOT_MASK (1 << LPS22HB_ONE_SHOT_POS)
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/**
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* @brief Control register 3 bitmasks.
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*/
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// Bitmasks for INT_H_L.
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#define LPS22HB_INT_H_L_POS 7
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#define LPS22HB_INT_H_L_MASK (1 << LPS22HB_INT_H_L_POS)
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// Bitmasks for PP_OD.
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#define LPS22HB_PP_OD_POS 6
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#define LPS22HB_PP_OD_MASK (1 << LPS22HB_PP_OD_POS)
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// Bitmasks for F_FSS5.
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#define LPS22HB_F_FSS5_POS 5
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#define LPS22HB_F_FSS5_MASK (1 << LPS22HB_F_FSS5_POS)
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// Bitmasks for F_FTH.
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#define LPS22HB_F_FTH_POS 4
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#define LPS22HB_F_FTH_MASK (1 << LPS22HB_F_FTH_POS)
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// Bitmasks for F_OVR.
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#define LPS22HB_F_OVR_POS 3
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#define LPS22HB_F_OVR_MASK (1 << LPS22HB_F_OVR_POS)
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// Bitmasks for DRDY.
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#define LPS22HB_DRDY_POS 2
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#define LPS22HB_DRDY_MASK (1 << LPS22HB_DRDY_POS)
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// Bitmasks for INT_S.
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#define LPS22HB_INT_S_POS 0
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#define LPS22HB_INT_S_MASK (3 << LPS22HB_INT_S_POS)
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/**
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* @brief Fifo control register bitmasks.
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*/
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// Bitmasks for F_MODE.
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#define LPS22HB_F_MODE_POS 5
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#define LPS22HB_F_MODE_MASK (7 << LPS22HB_F_MODE_POS)
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// Bitmasks for WTM
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#define LPS22HB_WTM_POS 0
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#define LPS22HB_WTM_MASK (0x1F << LPS22HB_WTM_POS)
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/**
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* @brief Low power mode register bitmasks.
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*/
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// Register validity bitmask.
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#define LPS22HB_RES_CONF_VALID_MASK 0xFE
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// Bitmasks for LC_EN
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#define LPS22HB_LC_EN_POS 0
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#define LPS22HB_LC_EN_MASK (1 << LPS22HB_LC_EN_POS)
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/**
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* @brief INT source register bitmasks.
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*/
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// Bitmasks for IA
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#define LPS22HB_IA_POS 2
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#define LPS22HB_IA_MASK (1 << LPS22HB_IA_POS)
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// Bitmasks for PL
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#define LPS22HB_PL_POS 1
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#define LPS22HB_PL_MASK (1 << LPS22HB_PL_POS)
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// Bitmasks for PH
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#define LPS22HB_PH_POS 0
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#define LPS22HB_PH_MASK (1 << LPS22HB_PH_POS)
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/**
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* @brief FIFO status register bitmasks.
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*/
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// Bitmasks for FTH_FIFO
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#define LPS22HB_FTH_FIFO_POS 7
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#define LPS22HB_FTH_FIFO_MASK (1 << LPS22HB_FTH_FIFO_POS)
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// Bitmasks for OVR
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#define LPS22HB_OVR_POS 6
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#define LPS22HB_OVR_MASK (1 << LPS22HB_OVR_POS)
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// Bitmasks for stored data level
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#define LPS22HB_FSS_POS 0
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#define LPS22HB_FSS_MASK (0x3F << LPS22HB_FSS_POS)
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/**
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* @brief Status register bitmasks.
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*/
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// Bitmasks for T_OR.
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#define LPS22HB_T_OR_POS 5
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#define LPS22HB_T_OR_MASK (1 << LPS22HB_T_OR_POS)
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// Bitmasks for P_OR.
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#define LPS22HB_P_OR_POS 4
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#define LPS22HB_P_OR_MASK (1 << LPS22HB_P_OR_POS)
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// Bitmasks for T_DA.
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#define LPS22HB_T_DA_POS 1
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#define LPS22HB_T_DA_MASK (1 << LPS22HB_T_DA_POS)
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// Bitmasks for P_DA.
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#define LPS22HB_P_DA_POS 0
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#define LPS22HB_P_DA_MASK (1 << LPS22HB_P_DA_POS)
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/**
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* @brief Config registers defaults.
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*/
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#define LPS22HB_CTRL_REG2_DEFAULT 0x10
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/**
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* @brief Raw pressure and temperature data.
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*
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* @note For internal use only.
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*/
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typedef struct
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{
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uint8_t press_out_xl;
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uint8_t press_out_l;
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uint8_t press_out_h;
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uint8_t temp_out_l;
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uint8_t temp_out_h;
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} lps22hb_raw_data_t;
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/**
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* @brief Structure holding sensor instance
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*
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* @note For internal use only.
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*/
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typedef struct
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{
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nrf_twi_sensor_t * const p_sensor_data;
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uint8_t const sensor_addr;
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uint8_t interrupt_cfg;
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uint8_t ctrl_reg[3];
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uint8_t fifo_ctrl;
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} lps22hb_instance_t;
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#define LPS22HB_INTERNAL_INSTANCE_DEF(_lps22hb_inst_name, _p_twi_sensor, _sensor_address) \
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static lps22hb_instance_t _lps22hb_inst_name = \
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{ \
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.p_sensor_data = _p_twi_sensor, \
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.sensor_addr = _sensor_address, \
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}
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#define LPS22HB_INTERNAL_INT_CFG(_s, _diff_en, _lir, _ple, _phe) \
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NRF_TWI_SENSOR_REG_SET(_s.interrupt_cfg, LPS22HB_DIFF_EN_MASK, LPS22HB_DIFF_EN_POS, _diff_en); \
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NRF_TWI_SENSOR_REG_SET(_s.interrupt_cfg, LPS22HB_LIR_MASK, LPS22HB_LIR_POS, _lir); \
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NRF_TWI_SENSOR_REG_SET(_s.interrupt_cfg, LPS22HB_PLE_MASK, LPS22HB_PLE_POS, _ple); \
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NRF_TWI_SENSOR_REG_SET(_s.interrupt_cfg, LPS22HB_PHE_MASK, LPS22HB_PHE_POS, _phe);
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#define LPS22HB_INTERNAL_DATA_CFG(_s, _odr, _f_en, _f_cfg) \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[0], LPS22HB_ODR_MASK, LPS22HB_ODR_POS, _odr); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[0], LPS22HB_EN_LPFP_MASK, LPS22HB_EN_LPFP_POS, _f_en); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[0], LPS22HB_LPFP_CFG_MASK, LPS22HB_LPFP_CFG_POS, _f_cfg);
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#define LPS22HB_INTERNAL_FIFO_CFG(_s, _f_mode, _f_en, _f_stop, _f_wtm) \
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NRF_TWI_SENSOR_REG_SET(_s.fifo_ctrl, LPS22HB_F_MODE_MASK, LPS22HB_F_MODE_POS, _f_mode); \
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NRF_TWI_SENSOR_REG_SET(_s.fifo_ctrl, LPS22HB_WTM_MASK, LPS22HB_WTM_POS, _f_wtm); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[1], LPS22HB_FIFO_EN_MASK, LPS22HB_FIFO_EN_POS, _f_en); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[1], \
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LPS22HB_STOP_ON_FTH_MASK, \
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LPS22HB_STOP_ON_FTH_POS, \
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_f_stop)
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#define LPS22HB_INTERNAL_DRDY_CFG(_s, _activ, _pp_od, _fss, _fth, _ovr, _drdy, _high, _low) \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[2], LPS22HB_INT_H_L_MASK, LPS22HB_INT_H_L_POS, _activ); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[2], LPS22HB_PP_OD_MASK, LPS22HB_PP_OD_POS, _pp_od); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[2], LPS22HB_F_FSS5_MASK, LPS22HB_F_FSS5_POS, _fss); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[2], LPS22HB_F_FTH_MASK, LPS22HB_F_FTH_POS, _fth); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[2], LPS22HB_F_OVR_MASK, LPS22HB_F_OVR_POS, _ovr); \
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NRF_TWI_SENSOR_REG_SET(_s.ctrl_reg[2], \
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LPS22HB_INT_S_MASK, \
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LPS22HB_INT_S_POS, \
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(_low << 1) + _high);
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#ifdef __cplusplus
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}
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#endif
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#endif // LPS22HB_INTERNAL_H
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